Datasheet > 逻辑 > 栅极> MC14011B

MC14011B

更新时间： 2024-11-03 22:58:11

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		栅
页数	文件大小	规格书
11页	330K
描述
B-Suffix Series CMOS Gates

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

MC14011B 技术参数

生命周期：	Obsolete	Reach Compliance Code：	unknown
风险等级：	5.65	逻辑集成电路类型：	NAND GATE
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装等效代码：	DIE OR CHIP	电源：	5/15 V
认证状态：	Not Qualified	施密特触发器：	NO
子类别：	Gates	技术：	CMOS
温度等级：	INDUSTRIAL	Base Number Matches：	1

MC14011B 数据手册

SEMICONDUCTOR TECHNICAL DATA

The B Series logic gates are constructed with P and N channel

enhancement mode devices in a single monolithic structure (Complemen-

tary MOS). Their primary use is where low power dissipation and/or high

noise immunity is desired.

•

Supply Voltage Range = 3.0 Vdc to 18 Vdc

All Outputs Buffered

Capable of Driving Two Low–power TTL Loads or One Low–power

Schottky TTL Load Over the Rated Temperature Range.

Double Diode Protection on All Inputs Except: Triple Diode Protection

on MC14011B and MC14081B

Pin–for–Pin Replacements for Corresponding CD4000 Series B Suffix

Devices (Exceptions: MC14068B and MC14078B)

•

L SUFFIX

CERAMIC

CASE 632

P SUFFIX

PLASTIC

CASE 646

D SUFFIX

SOIC

CASE 751A

ORDERING INFORMATION

MC14XXXBCP

MC14XXXBCL

MC14XXXBD

Plastic

Ceramic

SOIC

= – 55° to 125°C for all packages.

MAXIMUM RATINGS* (Voltages Referenced to V

)

Symbol

Parameter

DC Supply Voltage

Value

Unit

– 0.5 to + 18.0

V , V

Input or Output Voltage (DC or Transient)

– 0.5 to V

+ 0.5

in out

l , l

Input or Output Current (DC or Transient),

per Pin

± 10

in out

Power Dissipation, per Package†

Storage Temperature

500

stg

– 65 to + 150

260

Lead Temperature (8–Second Soldering)

* Maximum Ratings are those values beyond which damage to the device may occur.

†Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C

Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C

This device contains protection circuitry to guard against damage

due to high static voltages or electric fields. However, precautions must

be taken to avoid applications of any voltage higher than maximum rated

voltages to this high-impedance circuit. For proper operation, V and

out

should be constrained to the range V

≤ (V or V ) ≤ V .

in out DD

Unused inputs must always be tied to an appropriate logic voltage

level (e.g., either V or V ). Unused outputs must be left open.

SS DD

REV 3

1/94

Motorola, Inc. 1995

MOTOROLA CMOS LOGIC DATA

MC14001B

12 3 4 5 6 7...11

中文翻译

下载PDF

与MC14011B相关器件

型号	品牌	获取价格	描述	数据表
MC14011BAL	MOTOROLA	获取价格	4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, CDIP14, 632-08
MC14011BAL/883	MOTOROLA	获取价格	NAND Gate, 4000/14000/40000 Series, 4-Func, 2-Input, CMOS, CDIP14, CERAMIC, DIP-14
MC14011BALD	MOTOROLA	获取价格	4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, CDIP14, 632-08
MC14011BALDS	MOTOROLA	获取价格	4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, CDIP14, 632-08
MC14011BALS	MOTOROLA	获取价格	NAND Gate, CMOS, CDIP14
MC14011BCL	MOTOROLA	获取价格	B-Suffix Series CMOS Gates
MC14011BCLD	MOTOROLA	获取价格	4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, CDIP14, 632-08
MC14011BCLDS	MOTOROLA	获取价格	4000/14000/40000 SERIES, QUAD 2-INPUT NAND GATE, CDIP14, 632-08
MC14011BCLG	MOTOROLA	获取价格	NAND Gate, 4000/14000/40000 Series, 4-Func, 2-Input, CMOS, CDIP14, LEAD FREE, CERAMIC, DIP
MC14011BCLS	MOTOROLA	获取价格	NAND Gate, CMOS, CDIP14

与MC14011B相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

13
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

7
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

35
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

31

产品中心

服务支持

精选活动

关于我们

帮助中心

MC14011B

MC14011B 技术参数

MC14011B 数据手册

与MC14011B相关器件

与MC14011B相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MC14011B

MC14011B 技术参数

MC14011B 数据手册

与MC14011B相关器件

与MC14011B相关文章

您还可以找

您在本页遇到什么问题？