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MC14007UBCP PDF预览

MC14007UBCP

更新时间: 2024-11-03 22:06:47
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 逻辑集成电路光电二极管
页数 文件大小 规格书
6页 246K
描述
Dual Complementary Pair Plus Inverter

MC14007UBCP 技术参数

生命周期:Transferred零件包装代码:DIP
包装说明:DIP, DIP14,.3针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.06其他特性:DUAL COMPLEMENTARY PAIR PLUS INVERTER; OPEN SOURCE/DRAIN O/P'S FROM COMPLEMENTARY PAIR
系列:4000/14000/40000JESD-30 代码:R-PDIP-T14
JESD-609代码:e0长度:18.86 mm
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
功能数量:3输入次数:1
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:5/15 V传播延迟(tpd):125 ns
认证状态:Not Qualified座面最大高度:4.69 mm
子类别:Gates最大供电电压 (Vsup):18 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

MC14007UBCP 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 632  
The MC14007UB multi–purpose device consists of three N–channel and  
three P–channel enhancement mode devices packaged to provide access to  
each device. These versatile parts are useful in inverter circuits, pulse–  
shapers, linear amplifiers, high input impedance amplifiers, threshold  
detectors, transmission gating, and functional gating.  
P SUFFIX  
PLASTIC  
CASE 646  
Diode Protection on All Inputs  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
Pin–for–Pin Replacement for CD4007A or CD4007UB  
This device has 2 outputs without ESD Protection. Anti–static  
precautions must be taken.  
D SUFFIX  
SOIC  
CASE 751A  
ORDERING INFORMATION  
MC14XXXUBCP  
MC14XXXUBCL  
MC14XXXUBD  
Plastic  
Ceramic  
SOIC  
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
T
A
= – 55° to 125°C for all packages.  
V
DD  
– 0.5 to + 18.0  
V , V  
in out  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
l , l  
in out  
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
PIN ASSIGNMENT  
D–P  
S–P  
1
2
3
4
14  
13  
12  
11  
V
B
B
B
B
DD  
D–P  
P
Power Dissipation, per Package†  
Storage Temperature  
500  
mW  
C
D
A
T
stg  
– 65 to + 150  
260  
GATE  
S–N  
OUT  
C
T
Lead Temperature (8–Second Soldering)  
C
L
S–P  
C
* Maximum Ratings are those values beyond which damage to the device may occur.  
Temperature Derating:  
D–N  
5
6
10  
9
GATE  
C
B
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
GATE  
S–N  
C
A
V
7
8
D–N  
A
SS  
A
A
D = DRAIN  
S = SOURCE  
12  
1
9
B
B
C
2
4
C
SCHEMATIC  
3
5
14 13  
2
1
11  
INPUT  
V
DD  
14  
11  
6
12  
13  
8
INPUT OUTPUT CONDITION  
INPUT  
6
10  
1
0
A = C, B = OPEN  
A = B, C = OPEN  
7
8
3
4
5
10  
9
7
V
SS  
Substrates of P–channel devices internally  
V
V
= PIN 14  
= PIN 7  
DD  
SS  
connected to V ; substrates of N–channel  
DD  
devices internally connected to V  
.
SS  
Figure 1. Typical Application: 2–Input Analog Multiplexer  
REV 3  
1/94  
Motorola, Inc. 1995  

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