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MC14007 PDF预览

MC14007

更新时间: 2024-01-31 18:37:30
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 243K
描述
Dual Complementary Pair Plus Inverter

MC14007 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:LEAD FREE, EIAJ, SO-14
针数:14Reach Compliance Code:unknown
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.04Is Samacsys:N
系列:4000/14000/40000JESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:10.2 mm
逻辑集成电路类型:INVERTER功能数量:3
输入次数:1端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:5/15 V传播延迟(tpd):125 ns
认证状态:Not Qualified座面最大高度:2.05 mm
子类别:Gates最大供电电压 (Vsup):18 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:5.275 mmBase Number Matches:1

MC14007 数据手册

 浏览型号MC14007的Datasheet PDF文件第2页浏览型号MC14007的Datasheet PDF文件第3页浏览型号MC14007的Datasheet PDF文件第4页浏览型号MC14007的Datasheet PDF文件第5页浏览型号MC14007的Datasheet PDF文件第6页浏览型号MC14007的Datasheet PDF文件第7页 
The MC14007UB multi–purpose device consists of three  
N–channel and three P–channel enhancement mode devices packaged  
to provide access to each device. These versatile parts are useful in  
inverter circuits, pulse–shapers, linear amplifiers, high input  
impedance amplifiers, threshold detectors, transmission gating, and  
functional gating.  
http://onsemi.com  
MARKING  
DIAGRAMS  
14  
Diode Protection on All Inputs  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
PDIP–14  
P SUFFIX  
CASE 646  
MC14007UBCP  
AWLYYWW  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
Pin–for–Pin Replacement for CD4007A or CD4007UB  
This device has 2 outputs without ESD Protection. Anti–static  
precautions must be taken.  
1
14  
SOIC–14  
D SUFFIX  
CASE 751A  
14007U  
AWLYWW  
1
14  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
SS  
TSSOP–14  
DT SUFFIX  
CASE 948G  
14  
007U  
ALYW  
Symbol  
Parameter  
Value  
Unit  
V
V
DD  
DC Supply Voltage Range  
0.5 to +18.0  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
DD  
1
14  
1
I , I  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
in out  
SOEIAJ–14  
F SUFFIX  
CASE 965  
MC14007U  
AWLYWW  
P
D
Power Dissipation,  
per Package (Note 3.)  
500  
mW  
T
Ambient Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
A
A
= Assembly Location  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
T
stg  
T
Lead Temperature  
(8–Second Soldering)  
L
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
ORDERING INFORMATION  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Device  
Package  
PDIP–14  
SOIC–14  
Shipping  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
MC14007UBCP  
MC14007UBD  
MC14007UBDR2  
MC14007UBDT  
MC14007UBF  
2000/Box  
55/Rail  
high–impedancecircuit. For proper operation, V and V should be constrained  
in  
out  
SOIC–14 2500/Tape & Reel  
to the range V  
(V or V  
)
V
DD  
.
SS  
in  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
96/Rail  
TSSOP–14  
SOEIAJ–14  
SS  
DD  
See Note 1.  
See Note 1.  
MC14007UBFEL SOEIAJ–14  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14007UB/D  

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