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MC10H189FN PDF预览

MC10H189FN

更新时间: 2024-09-24 05:10:19
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发器逻辑集成电路
页数 文件大小 规格书
6页 152K
描述
Hex Inverter with Enable

MC10H189FN 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:PLASTIC, LCC-20
针数:20Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:7.77
系列:10HJESD-30 代码:S-PQCC-J20
JESD-609代码:e0长度:8.965 mm
逻辑集成电路类型:INVERTER功能数量:6
输入次数:1端子数量:20
最高工作温度:75 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC20,.4SQ封装形状:SQUARE
封装形式:CHIP CARRIER包装方法:RAIL
峰值回流温度(摄氏度):240最大电源电流(ICC):46 mA
Prop。Delay @ Nom-Sup:1.9 ns传播延迟(tpd):1.9 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:4.57 mm子类别:Gates
表面贴装:YES技术:ECL
温度等级:COMMERCIAL EXTENDED端子面层:Tin/Lead (Sn80Pb20)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:8.965 mmBase Number Matches:1

MC10H189FN 数据手册

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MC10H189  
Hex Inverter with Enable  
Description  
The MC10H189 is a Hex Inverter with a common Enable input. The  
hex inverting function is provided when Enable is in the lowstate.  
When Enable is in the highstate, all outputs are low.  
This MECL 10Hpart is a functional/pinout duplication of the  
standard MECL 10Kfamily part, with 100% improvement in  
propagation delay and no increase in powersupply current.  
http://onsemi.com  
MARKING DIAGRAMS*  
Features  
Propagation Delay, 1.3 ns Typical DatatoOutput  
Power Dissipation 180 mW Typ/Pkg (No Load)  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
16  
MC10H189L  
AWLYYWW  
1
Voltage Compensated  
CDIP16  
L SUFFIX  
CASE 620A  
MECL 10K Compatible  
PbFree Packages are Available*  
LOGIC DIAGRAM  
16  
1
X
OUT  
9
5
MC10H189P  
AWLYYWWG  
2
16  
Y
TRUTH TABLE  
Inputs Output  
1
3
6
7
PDIP16  
P SUFFIX  
CASE 648  
X
L
Y
L
OUT  
H
L
L
L
4
L
H
L
H
H
H
13  
14  
15  
10H189  
ALYWG  
10  
11  
12  
V
V
V
= Pin 1  
CC1  
CC2  
EE  
= Pin 16  
= Pin 8  
SOEIAJ16  
CASE 966  
1 20  
DIP  
PIN ASSIGNMENT  
V
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
CC2  
10H189G  
AWLYYWW  
20  
CC1  
OUT  
OUT  
OUT  
1
A
B
C
F
OUT  
PLLC20  
FN SUFFIX  
CASE 775  
E
OUT  
D
F
OUT  
A
IN  
IN  
A
= Assembly Location  
= Year  
WL, L = Wafer Lot  
YY, Y  
WW, W = Work Week  
G
B
C
E
IN  
IN  
IN  
D
IN  
= PbFree Package  
COMMON  
V
EE  
Pin assignment is for DualinLine Package.  
For PLCC pin assignment, see the Pin Conversion Tables on page 18  
of the ON Semiconductor MECL Data Book (DL122/D).  
*For additional marking information, refer to  
Application Note AND8002/D.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
February, 2006 Rev. 8  
MC10H189/D  

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