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MC10H175L PDF预览

MC10H175L

更新时间: 2024-11-03 22:58:11
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 触发器锁存器逻辑集成电路
页数 文件大小 规格书
4页 98K
描述
Quint Latch

MC10H175L 技术参数

生命周期:Transferred零件包装代码:DIP
包装说明:DIP,针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.22Is Samacsys:N
其他特性:WITH DUAL LATCH ENABLE; RESET ACTIVE ONLY WHEN LATCH ENABLE IS HIGH系列:10H
JESD-30 代码:R-GDIP-T16JESD-609代码:e0
长度:19.495 mm逻辑集成电路类型:D LATCH
位数:5功能数量:1
端子数量:16最高工作温度:75 °C
最低工作温度:输出特性:OPEN-EMITTER
输出极性:TRUE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE最大电源电流(ICC):107 mA
传播延迟(tpd):2.1 ns认证状态:Not Qualified
座面最大高度:5.08 mm表面贴装:NO
技术:ECL温度等级:COMMERCIAL EXTENDED
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
触发器类型:LOW LEVEL宽度:7.62 mm
Base Number Matches:1

MC10H175L 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10H175 is a quint D type latch with common reset and clock lines.  
This MECL 10KH part is a functional/pinout duplication of the standard MECL  
10K family part, with 100% improvement in propagation delay and no increase  
in power–supply current.  
Propagation Delay, 1.2 ns Typical  
Power Dissipation, 400 mW Typical  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
Voltage Compensated  
MECL 10K–Compatible  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
MAXIMUM RATINGS  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
FN SUFFIX  
PLCC  
CASE 775–02  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
CC  
Input Voltage (V  
= 0)  
V
I
0 to V  
50  
CC  
EE  
Output CurrentContinuous  
— Surge  
I
out  
100  
Operating Temperature Range  
T
A
0 to +75  
°C  
TRUTH TABLE  
Storage Temperature RangePlastic  
— Ceramic  
T
stg  
–55 to +150  
–55 to +165  
°C  
°C  
D
C0  
C1  
Reset  
Q
n+1  
L
H
Qn  
Qn  
L
L
L
H
X
H
X
L
L
X
H
X
H
X
X
L
L
H
H
L
H
X
X
X
X
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%) (See Note)  
EE  
25°  
75°  
Characteristic  
Symbol Min  
Max  
Min  
Max  
Min  
Max  
Unit  
Power Supply Current  
I
E
107  
97  
107  
mA  
L
Input Current High  
Pins 5,6,7,9,10,12,13  
Pin 11  
I
µA  
inH  
565  
335  
660  
335  
660  
1120  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
I
0.5  
0.5  
0.3  
µA  
inL  
DIP  
PIN ASSIGNMENT  
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc  
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
OH  
V
OL  
V
IH  
V
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
V
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45  
Vdc  
IL  
Q2  
Q3  
Q4  
D4  
C0  
C1  
Q1  
Q0  
D2  
D1  
AC PARAMETERS  
Propagation Delay  
Data  
Clock  
Reset  
t
pd  
ns  
0.6  
0.7  
1.0  
1.6  
1.9  
2.2  
0.6  
0.7  
1.0  
1.6  
2.0  
2.3  
0.6  
0.8  
1.0  
1.7  
2.1  
2.4  
Set–up Time  
Hold Time  
Rise Time  
Fall Time  
NOTE:  
t
1.5  
0.8  
0.5  
0.5  
1.5  
0.8  
0.5  
0.5  
1.5  
0.8  
0.5  
0.5  
ns  
ns  
ns  
ns  
set  
RESET  
D0  
t
hold  
t
r
1.8  
1.8  
1.9  
1.9  
2.0  
2.0  
t
f
D3  
V
EE  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test  
table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a  
printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are  
terminated through a 50–ohm resistor to –2.0 volts.  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

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