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MC10H174 PDF预览

MC10H174

更新时间: 2024-09-22 22:58:11
品牌 Logo 应用领域
安森美 - ONSEMI 复用器
页数 文件大小 规格书
4页 107K
描述
Dual 4 to Multiplexer

MC10H174 数据手册

 浏览型号MC10H174的Datasheet PDF文件第2页浏览型号MC10H174的Datasheet PDF文件第3页浏览型号MC10H174的Datasheet PDF文件第4页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10H174 is a Dual 4–to–1 Multiplexer. This device is a functional/  
pinout duplication of the standard MECL 10K part, with 100% improvement in  
propagation delay and no increase in power supply current.  
Propagation Delay, 1.5 ns Typical  
Power Dissipation, 305 mW Typical  
Improved Noise Margin 150 mV (over operating voltage and  
temperature range)  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
Voltage Compensated  
MECL 10K–Compatible  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
MAXIMUM RATINGS  
FN SUFFIX  
PLCC  
CASE 775–02  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
CC  
Input Voltage (V  
= 0)  
V
I
0 to V  
CC  
EE  
Output CurrentContinuous  
— Surge  
I
out  
50  
100  
TRUTH TABLE  
Operating Temperature Range  
T
A
0 to +75  
°C  
ENABLE ADDRESS INPUTS  
OUTPUTS  
Storage Temperature RangePlastic  
— Ceramic  
T
–55 to +150  
–55 to +165  
°C  
°C  
stg  
E
H
L
B
X
L
A
X
L
Z
W
L
L
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%) (See Note)  
EE  
X0  
X1  
X2  
Y0  
Y1  
Y2  
25°  
75°  
L
L
H
L
Characteristic  
Symbol Min  
Max  
Min  
Max  
Min  
Max  
Unit  
L
H
Power Supply Current  
I
E
80  
73  
80  
mA  
L
H
H
X3  
Y3  
Input Current High  
Pins 3–7 & 9–13  
Pin 14  
I
µAdc  
inH  
475  
670  
300  
420  
300  
420  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
I
0.5  
0.5  
0.3  
µA  
inL  
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc  
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
OH  
DIP  
PIN ASSIGNMENT  
V
OL  
V
IH  
V
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45  
Vdc  
IL  
V
V
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
CC2  
AC PARAMETERS  
Q1  
Q0  
DO0  
DO2  
DO1  
DO3  
A
Propagation Delay  
Data  
Select (A, B)  
Enable  
t
pd  
ns  
ENABLE  
D10  
0.7  
1.0  
0.4  
2.4  
2.8  
1.45  
0.8  
1.1  
0.4  
2.5  
2.9  
1.5  
0.9  
1.2  
0.5  
2.6  
3.2  
1.7  
D12  
Rise Time  
Fall Time  
NOTE:  
t
r
0.5  
0.5  
1.5  
1.5  
0.5  
0.5  
1.6  
1.6  
0.5  
0.5  
1.7  
1.7  
ns  
ns  
t
f
D11  
D13  
B
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed  
circuit board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated  
through a 50–ohm resistor to –2.0 volts.  
V
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
9/96  
Motorola, Inc. 1996  
REV 6  

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