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MC10H173LS PDF预览

MC10H173LS

更新时间: 2024-09-23 13:11:15
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摩托罗拉 - MOTOROLA 复用器输入元件
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MC10H173LS 数据手册

 浏览型号MC10H173LS的Datasheet PDF文件第2页浏览型号MC10H173LS的Datasheet PDF文件第3页浏览型号MC10H173LS的Datasheet PDF文件第4页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10H173 is a quad 2–input multiplexer with latch. This device is a  
functional/pinout duplication of the standard MECL 10K part, with 100%  
improvement in propagation delay and no increase in power supply current.  
Data Propagation Delay, 1.5 ns Typical  
Power Dissipation, 275 mW Typical  
Improved Noise Margin 150 mV (over  
operating voltage and temperature range)  
Voltage Compensated  
MECL 10K–Compatible  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
MAXIMUM RATINGS  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
Power Supply (V  
Input Voltage (V  
= 0)  
V
–8.0 to 0  
CC  
= 0)  
EE  
FN SUFFIX  
PLCC  
CASE 775–02  
V
I
0 to V  
EE  
CC  
Output Current — Continuous  
— Surge  
I
50  
100  
out  
Operating Temperature Range  
T
A
0 to +75  
°C  
Storage Temperature Range — Plastic  
— Ceramic  
T
–55 to +150  
–55 to +165  
°C  
°C  
stg  
TRUTH TABLE  
ELECTRICAL CHARACTERISTICS (V  
= –5.2 V ±5%) (See Note)  
EE  
SELECT  
CLOCK  
Q0  
n + 1  
0°  
25°  
75°  
H
L
X
L
L
H
D00  
D01  
Characteristic  
Symbol  
Min  
Max  
Min  
Max  
Min  
Max  
Unit  
Power Supply Current  
I
73  
66  
73  
mA  
Q0  
E
n
Input Current High  
Pins 3–7 & 10–13  
Pin 9  
I
µA  
inH  
510  
475  
320  
300  
320  
300  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
I
0.5  
0.5  
0.3  
µA  
inL  
V
–1.02 –0.84 –0.98 –0.81 –0.92  
–1.95 –1.63 –1.95 –1.63 –1.95  
–1.17 –0.84 –1.13 –0.81 –1.07  
–1.95 –1.48 –1.95 –1.48 –1.95  
–0.735  
–1.60  
Vdc  
Vdc  
Vdc  
Vdc  
OH  
DIP  
V
OL  
PIN ASSIGNMENT  
V
–0.735  
–1.45  
IH  
V
IL  
Q0  
Q1  
V
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
AC PARAMETERS  
Q2  
Propagation Delay  
Data  
Clock  
t
ns  
pd  
0.7  
1.0  
1.0  
2.3  
3.7  
3.6  
0.7  
1.0  
1.0  
2.3  
3.7  
3.6  
0.7  
1.0  
1.0  
2.3  
3.7  
3.6  
Q3  
D11  
Select  
D20  
D21  
D10  
Set–up Time  
Data  
Select  
t
ns  
ns  
set  
0.7  
1.0  
0.7  
1.0  
0.7  
1.0  
D01  
D30  
D00  
Hold Time  
Data  
Select  
t
hold  
0.7  
1.0  
0.7  
1.0  
0.7  
1.0  
CLOCK  
D31  
Rise Time  
Fall Time  
t
0.7  
0.7  
2.4  
2.4  
0.7  
0.7  
2.4  
2.4  
0.7  
0.7  
2.4  
2.4  
ns  
ns  
r
SELECT  
V
EE  
t
f
NOTE:  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed  
circuit board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated  
through a 50–ohm resistor to –2.0 volts.  
3/93  
Motorola, Inc. 1996  
REV 5  

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