MC10H135P

更新时间： 2024-11-03 22:58:11

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		触发器
页数	文件大小	规格书
3页	101K
描述
Dual J-K Master-Slave Flip-Flop

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中文翻译

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数据手册

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MC10H135P 数据手册

SEMICONDUCTOR TECHNICAL DATA

L SUFFIX

CERAMIC PACKAGE

CASE 620–10

The MC10H135 is a dual J–K master–slave flip–flop. The device is provided

with an asynchronous set(s) and reset(R). These set and reset inputs overide

the clock.

A common clock is provided with separate J–K inputs. When the clock is

static, the JK inputs do not effect the output. The output states of the flip flop

change on the positive transition of the clock.

P SUFFIX

PLASTIC PACKAGE

CASE 648–08

FN SUFFIX

PLCC

CASE 775–02

•

Propagation delay, 1.5 ns Typical

Power Dissipation, 280 mW

Typical/Pkg. (No Load)

•

Improved Noise Margin 150

mV (Over Operating Voltage

and Temperature Range)

•

250 MHz Max•

Voltage Compensated

MECL 10K–Compatible

tog

•

LOGIC DIAGRAM

MAXIMUM RATINGS

Characteristic

Symbol

Rating

Unit

Vdc

Power Supply (V

= 0)

–8.0 to 0

Input Voltage (V

= 0)

0 to V

PIN 1

PIN 16

PIN 8

CC1

CC2

Output Current— Continuous

— Surge

100

out

S2 12

Operating Temperature Range

0 to +75

°C

J2 10

K2 11

Storage Temperature Range— Plastic

— Ceramic

stg

–55 to +150

–55 to +165

°C

ELECTRICAL CHARACTERISTICS (V

0°

= –5.2 V ±5%) (See Note)

R2 13

25°

75°

RS TRUTH TABLE

CLOCK J–K TRUTH TABLE*

n + 1

Characteristic

Symbol Min

Max

Min

Max

Min

Max

Unit

Power Supply Current

—

Input Current High

Pins 6, 7, 10, 11

Pins 4, 5, 12, 13

Pin 9

µA

inH

—

460

800

675

—

285

500

420

—

285

500

420

N.D.

N.D. = Not Defined

*Output states change on

positive transition of clock

for J–K input condition

present.

Input Current Low

High Output Voltage

Low Output Voltage

High Input Voltage

Low Input Voltage

0.5

—

0.5

—

0.3

—

µA

–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc

–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc

–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc

–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc

DIP PIN ASSIGNMENT

CC2

CC1

AC PARAMETERS

Propagation Delay

Set, Reset, Clock

0.7

2.6

0.7

2.6

0.7

2.6

Rise Time

0.7

1.5

1.0

250

2.2

—

0.7

1.5

1.0

250

2.2

—

0.7

1.5

1.0

250

2.2

—

Fall Time

Set–up Time

Hold Time

set

—

hold

Toggle Frequency

—

MHz

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion

Tables on page 6–11 of the Motorola MECL Data

Book (DL122/D).

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NOTE:

Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,

afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit

board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through a

50–ohm resistor to –2.0 volts.

9/96

Motorola, Inc. 1996

REV 6

2–89

12 3

中文翻译

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与MC10H135P相关器件

型号	品牌	获取价格	描述	数据表
MC10H135PD	MOTOROLA	获取价格	J-K Flip-Flop, 2-Func, Master-slave Triggered, ECL, PDIP16
MC10H135PDS	MOTOROLA	获取价格	IC,FLIP-FLOP,DUAL,J/K TYPE,ECL,DIP,16PIN,PLASTIC
MC10H135PG	ONSEMI	获取价格	Dual J−K Master−Slave Flip−Flop
MC10H135PS	MOTOROLA	获取价格	J-K Flip-Flop, 2-Func, Master-slave Triggered, ECL, PDIP16
MC10H136	ONSEMI	获取价格	Universal Hexadecimal Counter
MC10H136_06	ONSEMI	获取价格	Universal Hexadecimal Counter
MC10H136FN	ONSEMI	获取价格	Universal Hexadecimal Counter
MC10H136FN	MOTOROLA	获取价格	Universal Hexadecimal Counter
MC10H136FNG	ONSEMI	获取价格	Universal Hexadecimal Counter
MC10H136FNG	ROCHESTER	获取价格	10H SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PQCC20, LEAD F

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