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MC10H135FN PDF预览

MC10H135FN

更新时间: 2024-09-23 05:10:23
品牌 Logo 应用领域
安森美 - ONSEMI 触发器锁存器逻辑集成电路
页数 文件大小 规格书
7页 154K
描述
Dual J−K Master−Slave Flip−Flop

MC10H135FN 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFN包装说明:PLASTIC, LLC-20
针数:20Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:7.39Is Samacsys:N
系列:10HJESD-30 代码:S-PQCC-J20
JESD-609代码:e0长度:8.965 mm
逻辑集成电路类型:JBAR-KBAR FLIP-FLOP最大频率@ Nom-Sup:250000000 Hz
位数:2功能数量:1
端子数量:20最高工作温度:75 °C
最低工作温度:输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC20,.4SQ封装形状:SQUARE
封装形式:CHIP CARRIER包装方法:RAIL
峰值回流温度(摄氏度):240最大电源电流(ICC):75 mA
传播延迟(tpd):2.6 ns认证状态:Not Qualified
座面最大高度:4.57 mm子类别:FF/Latches
表面贴装:YES技术:ECL
温度等级:COMMERCIAL EXTENDED端子面层:Tin/Lead (Sn80Pb20)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:8.965 mm
最小 fmax:250 MHzBase Number Matches:1

MC10H135FN 数据手册

 浏览型号MC10H135FN的Datasheet PDF文件第2页浏览型号MC10H135FN的Datasheet PDF文件第3页浏览型号MC10H135FN的Datasheet PDF文件第4页浏览型号MC10H135FN的Datasheet PDF文件第5页浏览型号MC10H135FN的Datasheet PDF文件第6页浏览型号MC10H135FN的Datasheet PDF文件第7页 
MC10H135  
Dual J−K Master−Slave  
Flip−Flop  
Description  
The MC10H135 is a dual JK masterslave flipflop. The device is  
provided with an asynchronous set(s) and reset(R). These set and reset  
inputs overide the clock.  
A common clock is provided with separate JK inputs. When the  
clock is static, the JK inputs do not effect the output. The output states  
of the flip flop change on the positive transition of the clock.  
http://onsemi.com  
MARKING DIAGRAMS*  
16  
Features  
MC10H135L  
AWLYYWW  
Propagation delay, 1.5 ns Typical  
Power Dissipation, 280 mW Typical/Pkg. (No Load)  
1
f 250 MHz Max  
CDIP16  
L SUFFIX  
CASE 620A  
tog  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
Voltage Compensated  
16  
1
MECL 10KCompatible  
MC10H135P  
AWLYYWWG  
PbFree Packages are Available*  
16  
1
PDIP16  
P SUFFIX  
CASE 648  
10H135  
ALYWG  
SOEIAJ16  
CASE 966  
1 20  
10H135G  
AWLYYWW  
20  
1
PLLC20  
FN SUFFIX  
CASE 775  
A
= Assembly Location  
= Year  
WL, L = Wafer Lot  
YY, Y  
WW, W = Work Week  
G
= PbFree Package  
*For additional marking information, refer to  
Application Note AND8002/D.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
February, 2006 Rev. 8  
MC10H135/D  

MC10H135FN 替代型号

型号 品牌 替代类型 描述 数据表
MC10H131FNG ONSEMI

类似代替

Dual D Type Master−Slave Flip−Flop
MC10H176FNR2G ONSEMI

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Hex D Master−Slave Flip−Flop
MC10H176FNG ONSEMI

类似代替

Hex D Master−Slave Flip−Flop

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