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MC10H135 PDF预览

MC10H135

更新时间: 2024-11-04 05:10:23
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
7页 154K
描述
Dual J−K Master−Slave Flip−Flop

MC10H135 数据手册

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MC10H135  
Dual J−K Master−Slave  
Flip−Flop  
Description  
The MC10H135 is a dual JK masterslave flipflop. The device is  
provided with an asynchronous set(s) and reset(R). These set and reset  
inputs overide the clock.  
A common clock is provided with separate JK inputs. When the  
clock is static, the JK inputs do not effect the output. The output states  
of the flip flop change on the positive transition of the clock.  
http://onsemi.com  
MARKING DIAGRAMS*  
16  
Features  
MC10H135L  
AWLYYWW  
Propagation delay, 1.5 ns Typical  
Power Dissipation, 280 mW Typical/Pkg. (No Load)  
1
f 250 MHz Max  
CDIP16  
L SUFFIX  
CASE 620A  
tog  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
Voltage Compensated  
16  
1
MECL 10KCompatible  
MC10H135P  
AWLYYWWG  
PbFree Packages are Available*  
16  
1
PDIP16  
P SUFFIX  
CASE 648  
10H135  
ALYWG  
SOEIAJ16  
CASE 966  
1 20  
10H135G  
AWLYYWW  
20  
1
PLLC20  
FN SUFFIX  
CASE 775  
A
= Assembly Location  
= Year  
WL, L = Wafer Lot  
YY, Y  
WW, W = Work Week  
G
= PbFree Package  
*For additional marking information, refer to  
Application Note AND8002/D.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
February, 2006 Rev. 8  
MC10H135/D  

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