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MC10H131

更新时间： 2024-09-22 22:58:11
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
4页 102K
描述
Dual D Type Master-Slave Flip-Flop

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中文翻译

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MC10H131 数据手册

 浏览型号MC10H131的Datasheet PDF文件第2页浏览型号MC10H131的Datasheet PDF文件第3页浏览型号MC10H131的Datasheet PDF文件第4页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10H131 is a MECL 10H part which is a functional/pinout duplication  
of the standard MECL 10K family part, with 100% improvement in clock speed  
and propagation delay and no increase in power–supply current.  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
•
•
•
Propagation Delay, 1.0 ns Typical  
Power Dissipation, 235 mW Typical  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
•
•
Voltage Compensated  
MECL 10K–Compatible  
FN SUFFIX  
PLCC  
CASE 775–02  
MAXIMUM RATINGS  
Characteristic  
= 0)  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
Power Supply (V  
Input Voltage (V  
V
–8.0 to 0  
CC  
= 0)  
EE  
LOGIC DIAGRAM  
V
I
0 to V  
EE  
CC  
S1  
5
Output Current — Continuous  
— Surge  
I
50  
100  
out  
2
3
Q1  
Q1  
D1  
CE1  
7
6
Operating Temperature Range  
T
A
0 to +75  
°C  
Storage Temperature Range — Plastic  
— Ceramic  
T
–55 to +150  
–55 to +165  
°C  
°C  
stg  
ELECTRICAL CHARACTERISTICS (V  
= –5.2 V ±5%) (See Note)  
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
EE  
R1  
4
9
CC1  
CC2  
EE  
0°  
25°  
75°  
C
C
R2 13  
Characteristic  
Symbol  
Min  
Max  
Min  
Max  
Min  
Max  
Unit  
Power Supply Current  
I
—
62  
—
56  
—
62  
mA  
E
14  
Q2  
Q2  
Input Current High  
Pins 6, 11  
Pin 9  
Pins 7, 10  
Pins 4, 5, 12, 13  
I
µA  
inH  
CE2 11  
D2 10  
—
—
—
—
530  
660  
485  
790  
—
—
—
—
310  
390  
285  
465  
—
—
—
—
310  
390  
285  
465  
15  
S2 12  
CLOCKED TRUTH TABLE  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
I
0.5  
—
0.5  
—
0.3  
—
µA  
inL  
RS TRUTH TABLE  
C
D
Q
n+1  
V
–1.02 –0.84 –0.98 –0.81 –0.92  
–1.95 –1.63 –1.95 –1.63 –1.95  
–1.17 –0.84 –1.13 –0.81 –1.07  
–1.95 –1.48 –1.95 –1.48 –1.95  
–0.735  
–1.60  
Vdc  
Vdc  
Vdc  
Vdc  
R
S
Q
n+1  
OH  
L
H
H
X
L
Q
n
L
L
L
L
H
L
Q
n
H
V
OL  
V
–0.735  
–1.45  
IH  
H
H
H
H
L
V
C = CE + C  
IL  
H
N.D.  
C
N.D. = Not Defined  
AC PARAMETERS  
A clock H is a clock transition  
from a low to a high state.  
Propagation Delay  
Clock, CE  
Set, Reset  
t
ns  
pd  
0.8  
0.6  
1.6  
1.6  
0.8  
0.7  
1.7  
1.7  
0.8  
0.7  
1.8  
1.8  
DIP  
PIN ASSIGNMENT  
Rise Time  
Fall Time  
t
0.6  
0.6  
0.7  
0.8  
250  
2.0  
2.0  
—
0.6  
0.6  
0.7  
0.8  
250  
2.0  
2.0  
—
0.6  
0.6  
0.7  
0.8  
250  
2.2  
2.2  
—
ns  
ns  
r
t
f
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
V
CC2  
CC1  
Q1  
Set–up Time  
Hold Time  
t
ns  
set  
Q2  
Q2  
R2  
S2  
t
—
—
—
ns  
hold  
Q1  
R1  
S1  
Toggle Frequency  
f
—
—
—
MHz  
tog  
NOTE:  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit  
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through  
a 50–ohm resistor to –2.0 volts.  
C
C
E1  
E2  
D2  
D1  
EE  
V
C
C
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  
1234

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