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MC10H121

更新时间： 2024-11-25 22:58:11

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
4页	113K
描述
4-WIDE OR-AND / OR-AND GATE

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中文翻译

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数据手册

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MC10H121 数据手册

The MC10H121 is a basic logic building block providing the

simultaneous OR–AND/OR–AND–Invert function, useful in data

control and digital multiplexing applications. This MECL 10H part is

a functional/pinout duplication of the standard MECL 10K family

part, with 100% improvement in propagation delay, and no increase in

power– supply current.

http://onsemi.com

MARKING

DIAGRAMS

• Propagation Delay, 1.0 ns Typical

• Power Dissipation 100 mW/Gate Typical (same as MECL 10K)

• Improved Noise Margin 150 mV (Over Operating Voltage and

Temperature Range)

CDIP–16

L SUFFIX

CASE 620A

MC10H121L

AWLYYWW

• Voltage Compensated

• MECL 10K–Compatible

PDIP–16

P SUFFIX

CASE 648

LOGIC DIAGRAM

MC10H121P

AWLYYWW

PLCC–20

FN SUFFIX

CASE 775

10H121

AWLYYWW

= Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

= PIN 1

= PIN 16

= PIN 8

CC1

ORDERING INFORMATION

CC2

Device

Package

Shipping

DIP

MC10H121L

CDIP–16

25 Units/Rail

PIN ASSIGNMENT

MC10H121P

PDIP–16

PLCC–20

25 Units/Rail

46 Units/Rail

CC1

CC2

MC10H121FN

OUT

A2 , A3

IN IN

A2I

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion Tables on page 18

of the ON Semiconductor MECL Data Book (DL122/D).

Semiconductor Components Industries, LLC, 2000

Publication Order Number:

May, 2000 – Rev. 7

MC10H121/D

12 3 4

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MC10H121_06	ONSEMI	获取价格	4−Wide OR−AND/OR−AND Gate
MC10H121FN	MOTOROLA	获取价格	4-Wide OR-AND/OR-AND Gate
MC10H121FN	ONSEMI	获取价格	4-WIDE OR-AND / OR-AND GATE
MC10H121FNG	ONSEMI	获取价格	4−Wide OR−AND/OR−AND Gate
MC10H121FNR2	ONSEMI	获取价格	4−Wide OR−AND/OR−AND Gate
MC10H121FNR2G	ONSEMI	获取价格	4−Wide OR−AND/OR−AND Gate
MC10H121L	MOTOROLA	获取价格	4-Wide OR-AND/OR-AND Gate
MC10H121L	ONSEMI	获取价格	4-WIDE OR-AND / OR-AND GATE
MC10H121LD	MOTOROLA	获取价格	OR-AND/OR-AND-Invert Gate, ECL10K, CDIP16
MC10H121LDS	MOTOROLA	获取价格	暂无描述