SEMICONDUCTOR TECHNICAL DATA
The MC10H116 is a functional/pinout duplication of the MC10116, with 100%
improvement in propagation delay and no increase in power– supply current.
•
•
•
Propagation Delay, 1.0 ns Typical
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
Power Dissipation 85 mW Typ/Pkg (same as MECL 10K)
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
•
•
Voltage Compensated
MECL 10K–Compatible
D SUFFIX
PLASTIC SOIC
CASE 751B–05
MAXIMUM RATINGS
Characteristic
= 0)
Symbol
Rating
Unit
Vdc
Vdc
mA
Power Supply (V
Input Voltage (V
V
–8.0 to 0
CC
= 0)
EE
FN SUFFIX
PLCC
CASE 775–02
V
I
0 to V
EE
CC
Output Current — Continuous
— Surge
I
50
100
out
Operating Temperature Range
T
A
0 to +75
°C
Storage Temperature Range — Plastic
— Ceramic
T
–55 to +150
–55 to +165
°C
°C
LOGIC DIAGRAM
stg
4
5
2
3
ELECTRICAL CHARACTERISTICS (V
= –5.2 V ±5%) (2)
EE
9
6
7
0°
25°
75°
10
Characteristic
Power Supply Current
Input Current High
Symbol
Min
—
Max
Min
—
Max
21
Min
—
Max
23
Unit
12
13
14
I
23
150
1.5
mA
µA
E
15
11
I
—
—
95
—
95
inH
V
*
BB
Input Leakage Current
Reference Voltage
I
—
—
1.0
—
1.0
µA
CBO
When input pin with
bubble goes positive
it’s respective output
pin with bubble goes
positive.
V
V
V
= Pin 1
= Pin 16
= Pin 8
CC1
CC2
EE
V
–1.38 –1.27 –1.35 –1.25 –1.31
–1.02 –0.84 –0.98 –0.81 –0.92
–1.95 –1.63 –1.95 –1.63 –1.95
–1.17 –0.84 –1.13 –0.81 –1.07
–1.95 –1.48 –1.95 –1.48 –1.95
–1.19
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
BB
High Output Voltage
Low Output Voltage
High Input Voltage (1)
Low Input Voltage (1)
V
–0.735
–1.60
–0.735
–1.45
—
OH
V
OL
*V
to be used to supply bias to the MC10H116 only
BB
and bypassed (when used) with 0.01 µF to 0.1 µF
V
IH
capacitor to ground (0 V). V can source < 1.0 mA.
The MC10H116 is designed to be used in sensing
differential signals over long lines. The bias supply
(V ) is made available to make the device useful as a
Schmitt trigger, or in other applications where a stable
reference voltage is necessary.
Active current sources provide these receivers with
excellent common–mode noise rejection. If any amplifi-
er in a package is not used, one input of that amplifier
BB
V
IL
Common Mode
Range (3)
V
—
—
–2.85 to –0.8
—
CMR
BB
Input Sensitivity (4)
V
—
—
150 typ
—
—
mV
PP
PP
AC PARAMETERS
must be connected to V
current–source bias network.
The MC10H116 does not have internal–input pull-
down resistors. This provides high impedance to the
amplifier input and facilitates differential connections.
Applications:
to prevent unbalancing the
BB
Propagation Delay
Rise Time
t
0.4
0.5
0.5
1.3
1.5
1.5
0.4
0.5
0.5
1.3
1.6
1.6
0.45
0.5
1.45
1.7
ns
ns
ns
pd
t
r
Fall Time
t
f
0.5
1.7
NOTES:
•
•
Low Level Receiver
Schmitt Trigger
•
Voltage Level
Interface
1. When V
is used as the reference voltage.
BB
2. Each MECL 10H series circuit has been designed to meet the specifications shown in the test table, after thermal
equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse
air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50–ohm resistor to –2.0 volts.
3. Differential input not to exceed 1.0 Vdc.
DIP PIN ASSIGNMENT
4. 150 mV
differential input required to obtain full logic swing on output.
p–p
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
V
CC2
CC1
OUT
OUT
A
A
C
C
C
C
OUT
OUT
IN
A
IN
IN
A
IN
B
B
V
B
B
OUT
BB
IN
OUT
V
IN
EE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
9/96
Motorola, Inc. 1996
REV 6
2–219
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