5秒后页面跳转
MC10H107LS PDF预览

MC10H107LS

更新时间: 2024-11-01 13:11:15
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅极触发器逻辑集成电路石英晶振
页数 文件大小 规格书
3页 100K
描述
XOR/XNOR Gate, ECL, CDIP16

MC10H107LS 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.92
JESD-30 代码:R-XDIP-T16JESD-609代码:e0
逻辑集成电路类型:XOR/XNOR GATE端子数量:16
最高工作温度:70 °C最低工作温度:
封装主体材料:CERAMIC封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE认证状态:Not Qualified
施密特触发器:NO子类别:Gates
表面贴装:NO技术:ECL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

MC10H107LS 数据手册

 浏览型号MC10H107LS的Datasheet PDF文件第2页浏览型号MC10H107LS的Datasheet PDF文件第3页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10H107 is a triple 2–input exclusive OR/NOR gate. This MECL 10H  
part is a functional/pinout duplication of the standard MECL 10K family part,  
with 100% improvement in propagation delay, and no increase in power–supply  
current.  
Propagation Delay, 1.0 ns Typical  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
Power Dissipation 35 mW/Gate Typical (same as MECL 10K)  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
Voltage Compensated  
MECL 10K–Compatible  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
FN SUFFIX  
PLCC  
CASE 775–02  
MAXIMUM RATINGS  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
CC  
Input Voltage (V  
= 0)  
V
I
0 to V  
CC  
EE  
LOGIC DIAGRAM  
Output CurrentContinuous  
— Surge  
I
out  
50  
100  
4
5
2
3
Operating Temperature Range  
T
A
0 to +75  
°C  
Storage Temperature RangePlastic  
— Ceramic  
T
stg  
–55 to +150  
–55 to +165  
°C  
°C  
9
7
11  
10  
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%) (See Note)  
EE  
14  
15  
12  
13  
25°  
75°  
Characteristic  
Power Supply Current  
Input Current High  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
Symbol Min  
Max  
31  
Min  
Max  
28  
Min  
Max  
31  
Unit  
I
mA  
µA  
µA  
E
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
CC1  
CC2  
EE  
I
425  
265  
265  
inH  
I
0.5  
0.5  
0.3  
inL  
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc  
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc  
OH  
V
OL  
DIP  
V
IH  
PIN ASSIGNMENT  
V
IL  
AC PARAMETERS  
Propagation Delay  
Rise Time  
V
A
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
t
0.4  
0.5  
0.5  
1.5  
1.5  
1.5  
0.4  
0.5  
0.5  
1.6  
1.6  
1.6  
0.4  
0.5  
0.5  
1.7  
1.7  
1.7  
ns  
ns  
ns  
pd  
C
C
C
C
t
r
IN  
OUT  
OUT  
Fall Time  
t
f
A
IN  
NOTE:  
A
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit  
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through  
a 50–ohm resistor to –2.0 volts.  
OUT  
OUT  
IN  
A
IN  
*NC  
B
OUT  
OUT  
IN  
B
B
B
IN  
V
EE  
*NC = No Connection  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

与MC10H107LS相关器件

型号 品牌 获取价格 描述 数据表
MC10H107M ONSEMI

获取价格

Triple 2−Input Exclusive OR/Exclusive NOR Gate
MC10H107MEL ONSEMI

获取价格

Triple 2−Input Exclusive OR/Exclusive NOR Gate
MC10H107MELG ONSEMI

获取价格

Triple 2−Input Exclusive OR/Exclusive NOR Gate
MC10H107MG ONSEMI

获取价格

Triple 2−Input Exclusive OR/Exclusive NOR Gate
MC10H107P ONSEMI

获取价格

Triple 2−Input Exclusive OR/Exclusive NOR Gate
MC10H107P MOTOROLA

获取价格

Triple 2-Input Exclusive OR/Exclusive NOR Gate
MC10H107PD MOTOROLA

获取价格

暂无描述
MC10H107PDS MOTOROLA

获取价格

XOR/XNOR Gate, ECL, PDIP16
MC10H107PG ONSEMI

获取价格

Triple 2−Input Exclusive OR/Exclusive NOR Gate
MC10H107PS MOTOROLA

获取价格

XOR/XNOR Gate, ECL, PDIP16