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MC10H105PS PDF预览

MC10H105PS

更新时间: 2024-09-13 12:59:39
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA
页数 文件大小 规格书
3页 98K
描述
OR/NOR Gate, ECL10K, PDIP16

MC10H105PS 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.92
JESD-30 代码:R-PDIP-T16JESD-609代码:e0
逻辑集成电路类型:OR/NOR GATE端子数量:16
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:-5.2 V
认证状态:Not Qualified施密特触发器:NO
子类别:Gates表面贴装:NO
技术:ECL10K温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

MC10H105PS 数据手册

 浏览型号MC10H105PS的Datasheet PDF文件第2页浏览型号MC10H105PS的Datasheet PDF文件第3页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10H105 is a triple 2–3–2–input OR/NOR gate. This MECL 10H part  
is a functional/pinout duplication of the standard MECL 10K family part, with  
100% improvement in propagation delay, and no increases in power–supply  
current.  
Propagation Delay, 1.0 ns Typical  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
Power Dissipation 25 mW/Gate (same as MECL 10K)  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
Voltage Compensated  
MECL 10K–Compatible  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
FN SUFFIX  
PLCC  
CASE 775–02  
MAXIMUM RATINGS  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
CC  
LOGIC DIAGRAM  
Input Voltage (V  
= 0)  
V
I
0 to V  
CC  
EE  
4
5
3
2
Output CurrentContinuous  
— Surge  
I
out  
50  
100  
Operating Temperature Range  
T
A
0 to +75  
°C  
9
10  
11  
6
7
Storage Temperature RangePlastic  
— Ceramic  
T
stg  
–55 to +150  
–55 to +165  
°C  
°C  
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%) (See Note)  
EE  
13  
12  
14  
15  
25°  
75°  
Characteristic  
Power Supply Current  
Input Current High  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
Symbol Min  
Max  
23  
Min  
Max  
21  
Min  
Max  
23  
Unit  
I
mA  
µA  
µA  
E
I
425  
265  
265  
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
inH  
CC1  
CC2  
EE  
I
0.5  
0.5  
0.3  
inL  
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc  
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc  
OH  
V
OL  
V
DIP  
IH  
PIN ASSIGNMENT  
V
IL  
AC PARAMETERS  
Propagation Delay  
Rise Time  
V
A
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
t
0.4  
0.5  
0.5  
1.2  
1.5  
1.5  
0.4  
0.5  
0.5  
1.2  
1.6  
1.6  
0.4  
0.5  
0.5  
1.3  
1.7  
1.7  
ns  
ns  
ns  
pd  
t
r
C
OUT  
OUT  
IN  
OUT  
OUT  
Fall Time  
t
f
C
C
C
A
NOTE:  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit  
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through  
a 50–ohm resistor to –2.0 volts.  
A
IN  
A
IN  
IN  
B
B
B
IN  
IN  
IN  
OUT  
B
B
OUT  
V
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

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