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MC10H104LDS

更新时间： 2024-01-19 01:46:36
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅
页数 文件大小 规格书
3页 98K
描述
Gate, ECL10K, CDIP16

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中文翻译

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MC10H104LDS 技术参数

是否Rohs认证：不符合生命周期：Obsolete
Reach Compliance Code：unknown风险等级：5.85
Is Samacsys：NJESD-30 代码：R-XDIP-T16
JESD-609代码：e0端子数量：16
最高工作温度：70 °C最低工作温度：
封装主体材料：CERAMIC封装代码：DIP
封装等效代码：DIP16,.3封装形状：RECTANGULAR
封装形式：IN-LINE施密特触发器：NO
子类别：Gates表面贴装：NO
技术：ECL10K温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
Base Number Matches：1

MC10H104LDS 数据手册

 浏览型号MC10H104LDS的Datasheet PDF文件第2页浏览型号MC10H104LDS的Datasheet PDF文件第3页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10H104 is a quad 2–input AND gate. One of the gates has both  
AND/NAND outputs available. This MECL 10H part is a functional/pinout  
duplication of the standard MECL 10K family part, with 100% improvement in  
propagation delay, and no increase in power– supply current.  
•
•
•
Propagation Delay, 1.0 ns Typical  
Power Dissipation 25 mW/Gate (same as MECL 10K)  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
Voltage Compensated  
MECL 10K–Compatible  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
•
•
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
FN SUFFIX  
PLCC  
MAXIMUM RATINGS  
CASE 775–02  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
CC  
Input Voltage (V  
= 0)  
V
I
0 to V  
CC  
EE  
Output Current— Continuous  
— Surge  
I
out  
50  
100  
LOGIC DIAGRAM  
Operating Temperature Range  
T
0 to +75  
°C  
4
5
A
2
3
Storage Temperature Range— Plastic  
— Ceramic  
T
stg  
–55 to +150  
–55 to +165  
°C  
°C  
6
7
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%) (See Note)  
EE  
10  
11  
25°  
75°  
14  
Characteristic  
Power Supply Current  
Input Current High  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
Symbol Min  
Max  
39  
Min  
—
Max  
35  
Min  
—
Max  
39  
Unit  
12  
13  
9
I
E
—
—
mA  
µA  
µA  
15  
I
425  
—
—
265  
—
—
265  
—
inH  
I
0.5  
0.5  
0.3  
inL  
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
CC1  
CC2  
EE  
V
OH  
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc  
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc  
V
OL  
V
IH  
V
IL  
DIP  
PIN ASSIGNMENT  
AC PARAMETERS  
Propagation Delay  
Rise Time  
t
0.4  
0.5  
0.5  
1.6  
1.6  
1.6  
0.45  
0.5  
1.75  
1.7  
0.45  
0.5  
1.9  
1.8  
1.8  
ns  
ns  
ns  
pd  
t
r
V
A
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
Fall Time  
t
f
0.5  
1.7  
0.5  
D
C
D
D
OUT  
OUT  
OUT  
OUT  
IN  
NOTE:  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit  
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through  
a 50–ohm resistor to –2.0 volts.  
B
A
IN  
A
IN  
IN  
B
C
C
D
IN  
IN  
B
IN  
IN  
V
OUT  
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
9/96  
Motorola, Inc. 1996  
REV 6  
123

中文翻译

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