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MC10H101LS PDF预览

MC10H101LS

更新时间: 2024-09-13 13:00:27
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅极触发器逻辑集成电路输出元件
页数 文件大小 规格书
3页 97K
描述
OR/NOR Gate, ECL10K, CDIP16

MC10H101LS 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
风险等级:5.9JESD-30 代码:R-XDIP-T16
JESD-609代码:e0逻辑集成电路类型:OR/NOR GATE
端子数量:16最高工作温度:70 °C
最低工作温度:封装主体材料:CERAMIC
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified施密特触发器:NO
子类别:Gates表面贴装:NO
技术:ECL10K温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

MC10H101LS 数据手册

 浏览型号MC10H101LS的Datasheet PDF文件第2页浏览型号MC10H101LS的Datasheet PDF文件第3页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10H101 is a quad 2–input OR/NOR gate with one input from each  
gate common to pin 12. This MECL 10H part is a functional/pinout duplication of  
the standard MECL 10K family part, with 100% improvement in propagation  
delay, and no increases in power–supply current.  
Propagation Delay, 1.0 ns Typical  
Power Dissipation 25 mW/Gate (same as MECL 10K)  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
Voltage Compensated  
MECL 10K–Compatible  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
FN SUFFIX  
PLCC  
MAXIMUM RATINGS  
CASE 775–02  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
CC  
Input Voltage (V  
= 0)  
V
I
0 to V  
CC  
EE  
Output CurrentContinuous  
— Surge  
I
out  
50  
100  
LOGIC DIAGRAM  
4
7
2
5
Operating Temperature Range  
T
0 to +75  
°C  
A
Storage Temperature RangePlastic  
— Ceramic  
T
stg  
–55 to +150  
–55 to +165  
°C  
°C  
3
6
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%) (See Note)  
EE  
25°  
75°  
10  
14  
11  
Characteristic  
Symbol Min  
Max  
Min  
Max  
Min  
Max  
Unit  
Power Supply Current  
I
29  
26  
29  
mA  
E
13  
12  
15  
9
Input Current High  
(Pin 12 only)  
I
425  
850  
265  
535  
265  
535  
µA  
inH  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
I
0.5  
0.5  
0.3  
µA  
inL  
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
CC1  
CC2  
EE  
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc  
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc  
OH  
V
OL  
V
IH  
V
IL  
DIP  
PIN ASSIGNMENT  
AC PARAMETERS  
Propagation Delay  
Pin 12 Only  
Exclude Pin 12  
t
ns  
pd  
0.5  
0.5  
1.6  
1.45  
0.5  
0.5  
1.6  
1.5  
0.5  
0.5  
1.7  
1.6  
V
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
OUT  
OUT  
D
C
D
A
B
OUT  
Rise Time  
Fall Time  
NOTE:  
t
r
0.5  
0.5  
2.1  
2.1  
0.5  
0.5  
2.2  
2.2  
0.5  
0.5  
2.3  
2.3  
ns  
ns  
t
f
OUT  
IN  
A
IN  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit  
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through  
a 50–ohm resistor to –2.0 volts.  
COMMON  
INPUT  
A
B
OUT  
C
OUT  
OUT  
C
B
IN  
IN  
D
V
OUT  
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

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