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MC10ELT24 PDF预览

MC10ELT24

更新时间: 2024-09-05 22:58:07
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
3页 85K
描述
TTL to Differential ECL Translator

MC10ELT24 数据手册

 浏览型号MC10ELT24的Datasheet PDF文件第2页浏览型号MC10ELT24的Datasheet PDF文件第3页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10ELT/100ELT24 is a TTL to differential ECL translator.  
Because ECL levels are used a +5V, -5.2V (or -4.5V) and ground are  
required. The small outline 8-lead SOIC package and the single gate of  
the ELT24 makes it ideal for those applications where space,  
performance and low power are at a premium. Because the mature  
MOSAIC 1.5 process is used, low cost can be added to the list of  
features.  
The ELT24 is available in both ECL standards: the 10ELT is compatible  
with MECL 10H logic levels while the 100ELT is compatible with ECL  
100K logic levels.  
8
1
1.2ns Typical Propagation Delay  
Differential PECL Outputs  
D SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751-05  
Small Outline SOIC Package  
PNP TTL Inputs for Minimal Loading  
Flow Through Pinouts  
LOGIC DIAGRAM AND PINOUT ASSIGNMENT  
V
1
2
8
7
V
CC  
EE  
TTL  
PIN DESCRIPTION  
FUNCTION  
D
Q
Q
PIN  
ECL  
Q
D
Diff ECL Outputs  
TTL Input  
Positive Supply  
Negative Supply  
Ground  
NC  
NC  
3
4
6
5
V
CC  
EE  
V
GND  
GND  
1/95  
Motorola, Inc. 1996  
REV 2  

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