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MC10EL05MNR4G

更新时间： 2024-11-20 05:10:27

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
9页	153K
描述
5V ECL 2-Input Differential AND/NAND

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MC10EL05MNR4G 数据手册

MC10EL05, MC100EL05

5VꢀECL 2-Input Differential

AND/NAND

The MC10EL/100EL05 is a 2-input differential AND/NAND gate.

The device is functionally equivalent to the E404 device with higher

performance capabilities. With propagation delays and output transition

times significantly faster than the E404, the EL05 is ideally suited for

those applications which require the ultimate in AC performance.

Because a negative 2-input NAND is equivalent to a 2-input OR

function, the differential inputs and outputs of the device allows the EL05

to also be used as a 2-input differential OR/NOR gate.

http://onsemi.com

MARKING

DIAGRAMS*

The differential inputs employ clamp circuitry so that under open input

conditions (pulled down to V ) the input to the AND gate will be

HEL05

ALYW

KEL05

ALYW

HIGH. In this way, if one set of inputs is open, the gate will remain active

SOIC−8

D SUFFIX

CASE 751

to the other input.

The 100 Series contains temperature compensation.

Features

• 275 ps Propagation Delay

HL05

ALYWG

KL05

• ESD Protection: > 1 kV Human Body Model,

TSSOP−8

DT SUFFIX

CASE 948R

ALYWG

> 100 V Machine Model

• PECL Mode Operating Range: V = 4.2 V to 5.7 V with V = 0 V

• NECL Mode Operating Range: V = 0 V with V = −4.2 V to −5.7 V

• Internal Input Pulldown Resistors

• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

• Moisture Sensitivity Level 1

DFN8

MN SUFFIX

CASE 506AA

For Additional Information, see Application Note AND8003/D

• Flammability Rating: UL 94 V−0 @ 0.125 in,

Oxygen Index: 28 to 34

• Transistor Count = 44 devices

• Pb−Free Packages are Available

= Wafer Lot

= Year

= Work Week

= Date Code

= Pb−Free Package

= MC10

= MC100

4O = MC10

2C = MC100

= Assembly Location

(Note: Microdot may be in either location)

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 6 of this data sheet.

Figure 1. Logic Diagram and Pinout

Assignment

Publication Order Number:

December, 2006 − Rev. 5

MC10EL05/D

12 3 4 5 6 7...9

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