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MC10211P PDF预览

MC10211P

更新时间: 2024-11-22 22:33:59
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅极逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
5页 106K
描述
Dual 3-Input/3-Output NOR Gate

MC10211P 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.64Is Samacsys:N
其他特性:3 OUTPUTS EACH FUNCTION系列:10K
JESD-30 代码:R-PDIP-T16JESD-609代码:e0
长度:19.175 mm逻辑集成电路类型:NOR GATE
功能数量:2输入次数:3
端子数量:16最高工作温度:85 °C
最低工作温度:-30 °C输出特性:OPEN-EMITTER
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED最大电源电流(ICC):42 mA
传播延迟(tpd):2.8 ns认证状态:Not Qualified
座面最大高度:4.44 mm表面贴装:NO
技术:ECL温度等级:OTHER
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

MC10211P 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10211 is designed to drive up to six transmission lines simul–  
taneously. The multiple outputs of this device also allow the wire “OR”–ing of  
several levels of gating for minimization of gate and package count.  
The ability to control three parallel lines with minimum propagation delay  
from a single point makes the MC10211 particularly useful in clock distribution  
applications where minimum clock skew is desired.  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
P
= 160 mW typ/pkg (No Loads)  
= 1.5 ns typ (All Output Loaded)  
D
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
t
pd  
t , t = 1.5 ns typ (20%–80%)  
r f  
FN SUFFIX  
PLCC  
CASE 775–02  
LOGIC DIAGRAM  
2
3
4
5
6
7
DIP  
PIN ASSIGNMENT  
12  
13  
14  
9
10  
11  
V
A
V
V
B
B
B
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
CC2  
CC1  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
A
A
V
V
V
= PIN 1, 15  
= PIN 16  
= PIN 8  
CC1  
CC2  
EE  
A
IN  
B
B
B
A
IN  
IN  
IN  
IN  
A
IN  
V
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–36 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

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