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MC10210

更新时间： 2024-11-23 04:41:03

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		栅
页数	文件大小	规格书
5页	72K
描述
Dual 3-Input/3-Output OR Gate

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数据手册

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MC10210 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MC10210 is designed to drive up to six transmission lines simul–

taneously. The multiple outputs of this device also allow the wire “OR” –ing of

several levels of gating for minimization of gate and package count.

The ability to control three parallel lines with minimum propagation delay

from a single point makes the MC10210 particularly useful in clock distribution

applications where minimum clock skew is desired.

L SUFFIX

CERAMIC PACKAGE

CASE 620–10

= 160 mW typ/pkg (No Loads)

= 1.5 ns typ (All Output Loaded)

P SUFFIX

PLASTIC PACKAGE

CASE 648–08

t , t = 1.5 ns typ (20%–80%)

r f

FN SUFFIX

PLCC

CASE 775–02

LOGIC DIAGRAM

DIP

PIN ASSIGNMENT

CC1

CC2

CC1

OUT

= PIN 1, 15

= PIN 16

= PIN 8

CC1

CC2

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion

Tables on page 6–36 of the Motorola MECL Data

Book (DL122/D).

3/93

Motorola, Inc. 1996

REV 5

3–182

12 3 4 5

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与MC10210相关器件

型号	品牌	获取价格	描述	数据表
MC10210FN	MOTOROLA	获取价格	Dual 3-Input/3-Output OR Gate
MC10210FNR2	MOTOROLA	获取价格	10K SERIES, DUAL 3-INPUT OR GATE, PQCC20, PLASTIC, LCC-20
MC10210L	MOTOROLA	获取价格	Dual 3-Input/3-Output OR Gate
MC10210LD	MOTOROLA	获取价格	OR Gate, ECL10K, CDIP16
MC10210LDS	MOTOROLA	获取价格	OR Gate, ECL10K, CDIP16
MC10210LS	MOTOROLA	获取价格	OR Gate, ECL10K, CDIP16
MC10210P	MOTOROLA	获取价格	Dual 3-Input/3-Output OR Gate
MC10210PD	MOTOROLA	获取价格	OR Gate, ECL10K, PDIP16
MC10210PDS	MOTOROLA	获取价格	OR Gate, ECL10K, PDIP16
MC10210PS	MOTOROLA	获取价格	暂无描述