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MC10192FN PDF预览

MC10192FN

更新时间： 2024-11-03 22:54:59
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 总线驱动器总线收发器逻辑集成电路
页数 文件大小 规格书
4页 106K
描述
Quad Bus Driver

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中文翻译

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MC10192FN 技术参数

生命周期：Transferred零件包装代码：QLCC
包装说明：QCCJ,针数：20
Reach Compliance Code：unknown风险等级：5.48
Is Samacsys：N其他特性：WITH 50 OHM LINE DRIVE CAPABILITY
系列：10KJESD-30 代码：S-PQCC-J20
JESD-609代码：e0长度：8.9662 mm
逻辑集成电路类型：BUS DRIVER位数：2
功能数量：2端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-30 °C输出特性：OPEN-COLLECTOR
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：QCCJ封装形状：SQUARE
封装形式：CHIP CARRIER最大电源电流（ICC）：154 mA
传播延迟（tpd）：4.5 ns认证状态：Not Qualified
座面最大高度：4.57 mm表面贴装：YES
技术：ECL温度等级：OTHER
端子面层：Tin/Lead (Sn/Pb)端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
宽度：8.9662 mmBase Number Matches：1

MC10192FN 数据手册

 浏览型号MC10192FN的Datasheet PDF文件第2页浏览型号MC10192FN的Datasheet PDF文件第3页浏览型号MC10192FN的Datasheet PDF文件第4页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10192 contains four line drivers with complementary outputs. Each  
driver has a Data (D) input and shares an Enable (E) input with another driver.  
The two driver outputs are the uncommitted collectors of a pair of NPN  
transistors operating as a current switch. Each driver accepts 10K MECL input  
signals and provides a nominal signal swing of 800 mV across a 50 Ω load at  
each output collector. Outputs can drive higher values of load resistance,  
provided that the combination of I drop and load return voltage V  
cause an output collector to go more negative than –2.4 V with respect to V  
CC  
To avoid output transistor breakdown, the load return voltage should not be  
does not  
R
LR  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
.
more positive than +5.5 V with respect to V . When the E input is high, both  
CC  
output transistors of a driver are nonconducting. When not used, the E inputs,  
as well as the D inputs, may be left open.  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
Open Collector Outputs Drive Terminated Lines or  
Transformers  
50 kΩ Input Pulldown Resistors on All Inputs (Unused  
Inputs May Be Left Open)  
FN SUFFIX  
PLCC  
CASE 775–02  
Power Dissipation = 575 mW typ/pkg (No Load)  
Propagation Delay= 3.5 ns typ (E — Output)  
3.0 ns typ (D — Output)  
DIP  
PIN ASSIGNMENT  
LOGIC DIAGRAM  
Z2  
Z2  
Z1  
Z1  
D1  
D2  
E1  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
E1  
D1  
7
5
3
4
1
2
Z1  
Z1  
Z2  
Z2  
Z3  
Z3  
Z4  
Z4  
D2  
6
D3 10  
15 Z3  
14 Z3  
13 Z4  
12 Z4  
D4  
D3  
E2  
V
EE  
D4 11  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
E2  
9
V
V
= PIN 16  
= PIN 8  
CC  
EE  
TRUTH TABLE  
Inputs Output  
E
H
L
D
X
H
L
Z
H
H
L
Z
H
L
L
H
Note: Unused outputs must be terminated  
to V  
for proper operation.  
CC  
3/93  
Motorola, Inc. 1996  
REV 5  
1234

中文翻译

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MC10192FN 替代型号

型号 品牌 替代类型 描述 数据表
MC10192FNR2 ONSEMI

功能相似

 10K SERIES, QUAD 2-BIT DRIVER, COMPLEMENTARY OUTPUT, PQCC20, PLASTIC, LCC-20
MC10192FN ONSEMI

功能相似

 Quad Bus Driver

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型号 品牌 获取价格 描述 数据表
MC10192FNR2 ONSEMI

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 		10K SERIES, QUAD 2-BIT DRIVER, COMPLEMENTARY OUTPUT, PQCC20, PLASTIC, LCC-20
MC10192FNR2 MOTOROLA

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 		10K SERIES, DUAL 2-BIT DRIVER, COMPLEMENTARY OUTPUT, PQCC20, PLASTIC, LCC-20
MC10192FNR2 ROCHESTER

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 		10K SERIES, QUAD 2-BIT DRIVER, COMPLEMENTARY OUTPUT, PQCC20, PLASTIC, LCC-20
MC10192L MOTOROLA

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 		Quad Bus Driver
MC10192L ONSEMI

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 		Quad Bus Driver
MC10192L ROCHESTER

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 		Bus Driver, 10K Series, 4-Func, 2-Bit, Complementary Output, ECL, CDIP16, CERAMIC, DIP-16
MC10192LDS MOTOROLA

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 		Line Driver/Receiver, 4 Driver, ECL10K, CDIP16
MC10192P ONSEMI

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 		Quad Bus Driver
MC10192P MOTOROLA

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 		Quad Bus Driver
MC10192PDS MOTOROLA

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 		Line Driver/Receiver, 4 Driver, ECL10K, PDIP16

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