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MC10162FN PDF预览

MC10162FN

更新时间: 2024-09-17 04:59:43
品牌 Logo 应用领域
安森美 - ONSEMI 解码器逻辑集成电路驱动
页数 文件大小 规格书
4页 91K
描述
Binary to 1-8 Decoder (High)

MC10162FN 数据手册

 浏览型号MC10162FN的Datasheet PDF文件第2页浏览型号MC10162FN的Datasheet PDF文件第3页浏览型号MC10162FN的Datasheet PDF文件第4页 
MC10162  
Binary to 1-8 Decoder  
(High)  
The MC10162 is designed to convert three lines of input data to a  
one–of–eight output. The selected output will be high while all other  
outputs are low. The enable inputs, when either or both are high, force  
all outputs low.  
http://onsemi.com  
The MC10162 is a true parallel decoder. No series gating is used  
internally, eliminating unequal delay times found in other decoders.  
This device is ideally suited for demultiplexer applications. One of  
the two enable inputs is used as the data input, while the other is used  
as a data enable input.  
MARKING  
DIAGRAMS  
16  
CDIP–16  
L SUFFIX  
CASE 620  
MC10162L  
AWLYYWW  
A complete mux/demux operation on 16 bits for data distribution is  
illustrated in Figure 1 of the MC10161 data sheet.  
1
P = 315 ns typ/pkg (No Load)  
16  
D
PDIP–16  
P SUFFIX  
CASE 648  
t = 4.0 ns typ  
pd  
MC10162P  
AWLYYWW  
t , t = 2.0 ns typ (20%–80%)  
r
f
1
LOGIC DIAGRAM  
1
E0Ą2  
E1Ą15  
PLCC–20  
FN SUFFIX  
CASE 775  
6ĄQ0  
5ĄQ1  
10162  
AWLYYWW  
4ĄQ2  
3ĄQ3  
13ĄQ4  
AĄ7  
BĄ9  
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
12ĄQ5  
DIP PIN ASSIGNMENT  
11ĄQ6  
10ĄQ7  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
V
CC2  
CĄ14  
CC1  
E0  
E1  
C
V
V
= PIN 1  
= PIN 16  
= PIN 8  
CC1  
Q3  
Q2  
Q1  
Q0  
A
CC2  
V
EE  
Q4  
Q5  
TRUTH TABLE  
Q6  
INPUTS  
OUTPUTS  
Q7  
B
E0  
E1  
C
B
A
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
L
L
L
L
L
L
L
L
H
X
L
L
L
L
L
L
L
L
X
H
L
L
L
L
L
H
L
H
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
H
L
L
V
EE  
L
H
H
L
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion Tables  
on page 18 of the ON Semiconductor MECL Data Book  
(DL122/D).  
L
H
L
H
H
H
H
X
X
L
H
L
H
H
X
X
H
X
X
ORDERING INFORMATION  
Device  
Package  
Shipping  
MC10162L  
CDIP–16  
25 Units / Rail  
MC10162P  
PDIP–16  
PLCC–20  
25 Units / Rail  
46 Units / Rail  
MC10162FN  
Semiconductor Components Industries, LLC, 2002  
1
Publication Order Number:  
January, 2002 – Rev. 7  
MC10162/D  

MC10162FN 替代型号

型号 品牌 替代类型 描述 数据表
MC10H172FNG ONSEMI

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