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MC10161 PDF预览

MC10161

更新时间: 2024-09-16 22:54:59
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
5页 124K
描述
Binary to 1-8 Decoder(Low)

MC10161 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10161 is designed to decode a three bit input word to a one of eight  
line output. The selected output will be low while all other outputs will be high. The  
enable inputs, when either or both are high, force all outputs high.  
The MC10161 is a true parallel decoder. No series gating is used internally,  
eliminating unequal delay times found in other decoders. This design provides  
the identical 4 ns delay from any address or enable input to any output.  
A complete mux/demux operation on 16 bits for data distribution is illustrated  
in Figure 1. This system, using the MC10136 control counters, has the  
capability of incrementing, decrementing or holding data channels. When both  
S0 and S1 are low, the index counters reset, thus initializing both the mux and  
demux units. The four binary outputs of the counter are buffered by the  
MC10101s to send twisted–pair select data to the multiplexer/demultiplexer to  
units.  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
FN SUFFIX  
PLCC  
CASE 775–02  
P
= 315 mW typ/pkg (No Load)  
= 4.0 ns typ  
D
t
pd  
t , t = 2.0 ns typ (20%–80%)  
r f  
DIP  
LOGIC DIAGRAM  
PIN ASSIGNMENT  
E0  
2
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
CC1  
CC2  
EE  
E1 15  
6
5
Q0  
Q1  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
V
CC2  
CC1  
E1  
C
E0  
4
3
Q2  
Q3  
Q3  
Q2  
Q1  
Q0  
A
A
B
7
Q4  
13 Q4  
12 Q5  
Q5  
Q6  
9
Q7  
B
11 Q6  
10 Q7  
V
EE  
C
14  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
TRUTH TABLE  
ENABLE  
INPUTS  
INPUTS  
OUTPUTS  
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7  
E1 E0  
C
B
A
L
L
L
L
L
L
L
L
H
X
L
L
L
L
L
L
L
L
X
H
L
L
L
L
L
H
H
L
L
H
L
H
L
H
L
H
X
X
L
H
L
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
X
X
L
H
H
X
X
H
H
3/93  
Motorola, Inc. 1996  
REV 5  

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