MC10141
Four Bit Universal Shift
Register
The MC10141 is a four–bit universal shift register which performs
shift left, or shift right, serial/parallel in, and serial/parallel out
operations with no external gating. Inputs S1 and S2 control the four
possible operations of the register without external gating of the clock.
The flip–flops shift information on the positive edge of the clock. The
four operations are stop shift, shift left, shift right, and parallel entry of
data. The other six inputs are all data type inputs; four for parallel
entry data, and one for shifting in from the left (DL) and one for
shifting in from the right (DR).
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MARKING
DIAGRAMS
16
CDIP–16
L SUFFIX
CASE 620
MC10141L
AWLYYWW
• P = 425 mW typ/pkg (No Load)
D
1
• f
= 200 MHz typ
Shift
16
• t , t = 2.0 ns typ (20%–80%)
r
f
PDIP–16
P SUFFIX
CASE 648
MC10141P
AWLYYWW
LOGIC DIAGRAM
D3
D2
D1
D0
1
Parallel Enter
1
S1
S2
1 of 4
Decode
r
Shift Right
PLCC–20
FN SUFFIX
CASE 775
10141
DR
AWLYYWW
Shift Left
Hold
DL
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
D Q
C
D Q
C
D Q
D Q
C
C
DIP PIN ASSIGNMENT
C
V
V
= PIN 1
= PIN 16
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
V
CC2
CC1
CC1
Q3
Q2
Q1
Q0
CC2
Q2
Q1
Q0
DL
D0
D1
S1
D2
V
= PIN 8
Q3
C
EE
TRUTH TABLE
DR
D3
S2
SELECT
S1 S2
OUTPUTS
Q1 Q2
OPERATING MODE
Parallel Entry
Shift Right*
Q0
Q3
n+1
n+1
n+1
n+1
L
L
L
H
L
D0
Q1
D1
D2
D3
DR
V
EE
Q2
Q0
Q1
Q3
Q1
Q2
n
n
n
n
n
n
n
H
H
Shift Left*
DL
Q0
Q2
Q3
n
n
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables
on page 18 of the ON Semiconductor MECL Data Book
(DL122/D).
H
Stop Shift
n
*Outputs as exist after pulse appears at “C” input with input conditions as
shown. (Pulse = Positive transition of clock input).
ORDERING INFORMATION
Device
Package
Shipping
MC10141L
CDIP–16
25 Units / Rail
MC10141P
PDIP–16
PLCC–20
25 Units / Rail
46 Units / Rail
MC10141FN
Semiconductor Components Industries, LLC, 2002
1
Publication Order Number:
January, 2002 – Rev. 7
MC10141/D