Datasheet > 逻辑 > 栅极> MC10121

MC10121

更新时间： 2024-11-25 22:54:59

品牌	Logo	应用领域
安森美 - ONSEMI		栅
页数	文件大小	规格书
5页	105K
描述
4-Wide OR-AND/OR-AND Gate

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

MC10121 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MC10121 is a basic logic building block providing the simultaneous

OR–AND/OR–AND–Invert function, useful in data control and digital multiplexing

applications.

L SUFFIX

CERAMIC PACKAGE

CASE 620–10

= 100 mW typ/pkg (No Load)

= 2.3 ns typ

t , t = 2.5 ns typ (20%–80%)

r f

P SUFFIX

PLASTIC PACKAGE

CASE 648–08

FN SUFFIX

PLCC

CASE 775–02

LOGIC DIAGRAM

DIP

PIN ASSIGNMENT

CC2

CC1

OUT

A2 , A3

= PIN 1

= PIN 16

= PIN 8

CC1

CC2

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion

Tables on page 6–11 of the Motorola MECL Data

Book (DL122/D).

3/93

Motorola, Inc. 1996

REV 5

3–73

12 3 4 5

中文翻译

下载PDF

与MC10121相关器件

型号	品牌	获取价格	描述	数据表
MC10121_02	ONSEMI	获取价格	4-Wide OR-AND/OR-AND Gate
MC10121FN	ONSEMI	获取价格	4-Wide OR-AND/OR-AND Gate
MC10121FN	MOTOROLA	获取价格	4-Wide OR-AND/OR-AND Gate
MC10121FNR2	ONSEMI	获取价格	10K SERIES, 11-INPUT OR-AND/OR-AND-INVERT GATE, PQCC20, PLASTIC, LCC-20
MC10121L	MOTOROLA	获取价格	4-Wide OR-AND/OR-AND Gate
MC10121L	ONSEMI	获取价格	4-Wide OR-AND/OR-AND Gate
MC10121LD	MOTOROLA	获取价格	OR-AND/OR-AND-Invert Gate, ECL10K, CDIP16
MC10121LDS	MOTOROLA	获取价格	暂无描述
MC10121LS	MOTOROLA	获取价格	OR-AND/OR-AND-Invert Gate, ECL10K, CDIP16
MC10121P	MOTOROLA	获取价格	4-Wide OR-AND/OR-AND Gate