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MC10117FN PDF预览

MC10117FN

更新时间: 2024-11-25 22:54:59
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA
页数 文件大小 规格书
5页 108K
描述
Dual 2-Wide 2-3-Input OR-AND/OR-AND Gate

MC10117FN 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:PLASTIC, LCC-20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.83
其他特性:COMMON INPUT系列:10K
JESD-30 代码:S-PQCC-J20JESD-609代码:e0
长度:8.965 mm逻辑集成电路类型:OR-AND/OR-AND-INVERT GATE
功能数量:2输入次数:5
端子数量:20最高工作温度:85 °C
最低工作温度:-30 °C输出特性:OPEN-EMITTER
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC20,.4SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):NOT SPECIFIED
电源:-5.2 V最大电源电流(ICC):29 mA
Prop。Delay @ Nom-Sup:3.8 ns传播延迟(tpd):3.8 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:4.57 mm子类别:Gates
表面贴装:YES技术:ECL
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8.965 mmBase Number Matches:1

MC10117FN 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10117 is a dual 2–wide 2–3–input OR–AND/OR–AND–Invert gate.  
This general purpose logic element is designed for use in data control, such as  
digital multiplexing or data distribution. Pin 9 is common to both gates.  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
P
t
= 100 mW typ/pkg (No Load)  
= 2.3 ns typ  
D
pd  
t , t = 2.2 ns typ (20%–80%)  
r f  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
FN SUFFIX  
PLCC  
CASE 775–02  
LOGIC DIAGRAM  
4
5
DIP  
PIN ASSIGNMENT  
3
2
6
7
V
A
V
B
B
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
CC2  
OUT  
OUT  
OUT  
OUT  
9
A
10  
11  
B1  
A1  
A1  
A2  
A2  
V
IN  
IN  
IN  
IN  
IN  
IN  
14  
15  
B1  
12  
13  
B2  
B2  
IN  
IN  
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
A2 , B2  
IN  
CC1  
CC2  
EE  
IN  
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

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