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MC10117 PDF预览

MC10117

更新时间: 2024-11-25 22:54:59
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
5页 108K
描述
Dual 2-Wide 2-3-Input OR-AND/OR-AND Gate

MC10117 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10117 is a dual 2–wide 2–3–input OR–AND/OR–AND–Invert gate.  
This general purpose logic element is designed for use in data control, such as  
digital multiplexing or data distribution. Pin 9 is common to both gates.  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
P
t
= 100 mW typ/pkg (No Load)  
= 2.3 ns typ  
D
pd  
t , t = 2.2 ns typ (20%–80%)  
r f  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
FN SUFFIX  
PLCC  
CASE 775–02  
LOGIC DIAGRAM  
4
5
DIP  
PIN ASSIGNMENT  
3
2
6
7
V
A
V
B
B
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
CC2  
OUT  
OUT  
OUT  
OUT  
9
A
10  
11  
B1  
A1  
A1  
A2  
A2  
V
IN  
IN  
IN  
IN  
IN  
IN  
14  
15  
B1  
12  
13  
B2  
B2  
IN  
IN  
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
A2 , B2  
IN  
CC1  
CC2  
EE  
IN  
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

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