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MC10110

更新时间： 2024-02-24 20:59:19

品牌	Logo	应用领域
安森美 - ONSEMI		栅
页数	文件大小	规格书
8页	70K
描述
Dual 3-Input/3-Output OR Gate

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中文翻译

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数据手册

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MC10110 数据手册

The ability to control three parallel lines from a single point makes

the MC10110 particularly useful in clock distribution applications

where minimum clock skew is desired. Three V

and each one should be used.

pins are provided

http://onsemi.com

• P = 80 mW typ/pkg (No Load)

MARKING

DIAGRAMS

• t = 2.4 ns typ (All Outputs Loaded)

• t , t = 2.2 ns typ (20%–80%)

r f

CDIP–16

L SUFFIX

CASE 620

MC10110L

AWLYYWW

LOGIC DIAGRAM

PDIP–16

P SUFFIX

CASE 648

MC10110P

AWLYYWW

= PIN 1, 15

= PIN 16

= PIN 8

CC1

PLCC–20

FN SUFFIX

CASE 775

CC2

10101

AWLYYWW

DIP

PIN ASSIGNMENT

= Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

CC2

CC1

OUT

ORDERING INFORMATION

OUT

Device

Package

Shipping

OUT

MC10110L

CDIP–16

25 Units / Rail

MC10110P

PDIP–16

PLCC–20

25 Units / Rail

46 Units / Rail

MC10110FN

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion Tables on page 18

of the ON Semiconductor MECL Data Book (DL122/D).

Semiconductor Components Industries, LLC, 2000

Publication Order Number:

March, 2000 – Rev. 7

MC10110/D

12 3 4 5 6 7 8

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与MC10110相关器件

型号	品牌	获取价格	描述	数据表
MC10110FN	ONSEMI	获取价格	Dual 3-Input/3-Output OR Gate
MC10110FNR2	MOTOROLA	获取价格	OR Gate, 10K Series, 2-Func, 3-Input, ECL, PQCC20, PLASTIC, LCC-20
MC10110L	ONSEMI	获取价格	Dual 3-Input/3-Output OR Gate
MC10110L	MOTOROLA	获取价格	Dual 3-Input/3-Ouput OR Gate
MC10110LDS	MOTOROLA	获取价格	OR Gate, ECL10K, CDIP16
MC10110LS	MOTOROLA	获取价格	OR Gate, ECL10K, CDIP16
MC10110P	MOTOROLA	获取价格	Dual 3-Input/3-Ouput OR Gate
MC10110P	ONSEMI	获取价格	Dual 3-Input/3-Output OR Gate
MC10110PDS	MOTOROLA	获取价格	OR Gate, ECL10K, PDIP16
MC10110PS	MOTOROLA	获取价格	OR Gate, ECL10K, PDIP16