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MC10104P

更新时间： 2024-09-28 22:54:59

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		栅
页数	文件大小	规格书
5页	106K
描述
Quad 2-Input AND Gate

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数据手册

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MC10104P 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MC10104 is a quad 2–input AND gate. One of the gates has both

AND/NAND outputs available.

= 35 mW typ/gate (No Load)

= 2.7 ns typ

t , t = 2.0 ns typ (20%–80%)

r f

L SUFFIX

CERAMIC PACKAGE

CASE 620–10

P SUFFIX

PLASTIC PACKAGE

CASE 648–08

LOGIC DIAGRAM

FN SUFFIX

PLCC

CASE 775–02

DIP

PIN ASSIGNMENT

CC2

CC1

OUT

= PIN 1

= PIN 16

= PIN 8

CC1

CC2

OUT

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion

Tables on page 6–11 of the Motorola MECL Data

Book (DL122/D).

3/93

Motorola, Inc. 1996

REV 5

3–16

12 3 4 5

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与MC10104P相关器件

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MC10104PD	MOTOROLA	获取价格	Gate, ECL10K, PDIP16
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MC10105	ONSEMI	获取价格	Triple 2-3-2-Input OR/NOR Gate
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MC10105FN	ONSEMI	获取价格	Triple 2-3-2-Input OR/NOR Gate
MC10105FN	MOTOROLA	获取价格	Triple 2-3-2-Input OR/NOR Gate
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