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MC10102PDS PDF预览

MC10102PDS

更新时间: 2024-11-25 13:11:15
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 栅极触发器逻辑集成电路输出元件
页数 文件大小 规格书
5页 105K
描述
Gate, ECL10K, PDIP16

MC10102PDS 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:R-PDIP-T16
JESD-609代码:e0端子数量:16
最高工作温度:85 °C最低工作温度:-30 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:-5.2 V
施密特触发器:NO子类别:Gates
表面贴装:NO技术:ECL10K
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUALBase Number Matches:1

MC10102PDS 数据手册

 浏览型号MC10102PDS的Datasheet PDF文件第2页浏览型号MC10102PDS的Datasheet PDF文件第3页浏览型号MC10102PDS的Datasheet PDF文件第4页浏览型号MC10102PDS的Datasheet PDF文件第5页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10102 is a quad 2–input NOR gate. The MC10102 provides one gate  
with OR/NOR outputs.  
P
= 25 mW typ/gate (No Load)  
= 2.0 ns typ  
D
t
pd  
t , t = 2.0 ns typ (20%–80%)  
r f  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
LOGIC DIAGRAM  
FN SUFFIX  
PLCC  
CASE 775–02  
4
5
2
6
7
3
10  
11  
DIP  
14  
PIN ASSIGNMENT  
12  
13  
15  
9
V
A
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
D
C
D
D
OUT  
OUT  
IN  
OUT  
OUT  
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
CC1  
CC2  
EE  
B
A
IN  
A
IN  
IN  
B
C
C
D
IN  
IN  
B
IN  
IN  
V
OUT  
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

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