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MC100LVELT23DT PDF预览

MC100LVELT23DT

更新时间: 2024-09-24 22:58:07
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
8页 70K
描述
3.3 V Dual Differential LVPECL/LVDS to LVTTL Translator

MC100LVELT23DT 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:TSSOP, TSSOP8,.19
针数:8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.13最大延迟:2.5 ns
接口集成电路类型:PECL TO TTL TRANSLATORJESD-30 代码:S-PDSO-G8
JESD-609代码:e0长度:3 mm
湿度敏感等级:1位数:1
功能数量:2端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出锁存器或寄存器:NONE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP8,.19封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):240
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.1 mm子类别:Level Translators
最大供电电压:3.8 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:ECL温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn90Pb10)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3 mm
Base Number Matches:1

MC100LVELT23DT 数据手册

 浏览型号MC100LVELT23DT的Datasheet PDF文件第2页浏览型号MC100LVELT23DT的Datasheet PDF文件第3页浏览型号MC100LVELT23DT的Datasheet PDF文件第4页浏览型号MC100LVELT23DT的Datasheet PDF文件第5页浏览型号MC100LVELT23DT的Datasheet PDF文件第6页浏览型号MC100LVELT23DT的Datasheet PDF文件第7页 
MC100LVELT23  
3.3 VꢀDual Differential  
LVPECL/LVDS to LVTTL  
Translator  
The MC100LVELT23 is a dual differential LVPECL/LVDS to  
LVTTL translator. Because LVPECL (Positive ECL) or LVDS levels  
are used only +3.3 V and ground are required. The small outline 8-lead  
package and the dual gate design of the LVELT23 makes it ideal for  
applications which require the translation of a clock and a data signal.  
The LVELT23 is available in only the ECL 100K standard. Since  
http://onsemi.com  
MARKING  
DIAGRAMS*  
8
there are no LVPECL outputs or an external V  
reference, the  
BB  
KVT23  
ALYW  
SOIC−8  
D SUFFIX  
CASE 751  
LVELT23 does not require both ECL standard versions. The LVPECL  
inputs are differential. Therefore, the MC100LVELT23 can accept any  
8
1
1
8
standard differential LVPECL input referenced from a V of +3.3 V.  
CC  
2.0 ns Typical Propagation Delay  
Maximum Frequency > 180 MHz  
Differential LVPECL Inputs  
TSSOP−8  
DT SUFFIX  
CASE 948R  
KR23  
ALYW  
8
1
1
PECL Mode Operating Range:V = 3.0 V to 3.8 V  
CC  
with GND = 0 V  
A
L
Y
W
= Assembly Location  
= Wafer Lot  
= Year  
24 mA LVTTL Outputs  
Flow Through Pinouts  
Internal Pulldown and Pullup Resistors  
Pb−Free Package is Available  
= Work Week  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
February, 2005 − Rev. 12  
MC100LVELT23/D  

MC100LVELT23DT 替代型号

型号 品牌 替代类型 描述 数据表
MC100LVELT23MNRG ONSEMI

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3.3V Dual Differential LVPECL/LVDS to LVTTL Translator
MC100EPT23DTR2G ONSEMI

完全替代

Dual Differential LVPECL to LVTTL Translator
MC100LVELT23DG ONSEMI

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3.3 V Dual Differential LVPECL/LVDS to LVTTL Translator

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