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MC100LVEL17DWR2 PDF预览

MC100LVEL17DWR2

更新时间: 2024-10-01 04:16:55
品牌 Logo 应用领域
安森美 - ONSEMI 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
6页 122K
描述
3.3V ECL Quad Differential Receiver

MC100LVEL17DWR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP-20
针数:20Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.32其他特性:CAN ALSO OPERATE WITH -3V TO -3.8V SUPPLY IN NECL MODE
差分输出:YES输入特性:DIFFERENTIAL
接口集成电路类型:LINE RECEIVER接口标准:GENERAL PURPOSE
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
长度:12.8 mm功能数量:4
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):240电源:-3.3/-5,3.3/5 V
认证状态:Not Qualified最大接收延迟:0.55 ns
接收器位数:4座面最大高度:2.65 mm
子类别:Line Driver or Receivers最大供电电压:3.8 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn80Pb20)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.5 mmBase Number Matches:1

MC100LVEL17DWR2 数据手册

 浏览型号MC100LVEL17DWR2的Datasheet PDF文件第2页浏览型号MC100LVEL17DWR2的Datasheet PDF文件第3页浏览型号MC100LVEL17DWR2的Datasheet PDF文件第4页浏览型号MC100LVEL17DWR2的Datasheet PDF文件第5页浏览型号MC100LVEL17DWR2的Datasheet PDF文件第6页 
MC100LVEL17  
3.3VꢀECL Quad Differential  
Receiver  
Description  
The MC100LVEL17 is a 3.3 V ECL, quad differential receiver. The  
device is functionally equivalent to the E116 device with the capability  
of operation from either a 3.3 V or +3.3 V supply voltage.  
http://onsemi.com  
Under open input conditions, the D input will be biased at V /2  
CC  
and the D input will be pulled down to V . This operation will force  
EE  
the Q output LOW and ensure stability.  
The V pin, an internally generated voltage supply, is available to  
BB  
this device only. For single-ended input conditions, the unused  
differential input is connected to V as a switching reference voltage.  
BB  
SO20 WB  
DW SUFFIX  
CASE 751D  
V
BB  
may also rebias AC coupled inputs. When used, decouple V  
BB  
and V via a 0.01 mF capacitor and limit current sourcing or sinking  
CC  
to 0.5 mA. When not used, V should be left open.  
BB  
Features  
325 ps Propagation Delay  
MARKING DIAGRAM*  
High Bandwidth Output Transitions  
The 100 Series Contains Temperature Compensation  
20  
PECL Mode Operating Range: V = 3.0 V to 3.8 V  
CC  
100LVEL17  
AWLYYWWG  
with V = 0 V  
EE  
NECL Mode Operating Range: V = 0 V  
CC  
with V = 3.0 V to 3.8 V  
EE  
1
Internal Input Pulldown Resistors D Inputs;  
Pullup and Pulldown on D Inputs  
Q Output will Default LOW with Inputs Open or at V  
A
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
EE  
WL  
YY  
WW  
G
PbFree Packages are Available*  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 Rev. 7  
MC100LVEL17/D  

MC100LVEL17DWR2 替代型号

型号 品牌 替代类型 描述 数据表
MC100EL17DWR2G ONSEMI

完全替代

5V ECL Quad Differential Receiver
MC100EL17DWR2 ONSEMI

完全替代

5V ECL Quad Differential Receiver
MC100LVEL17DW ONSEMI

完全替代

3.3V ECL Quad Differential Receiver

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