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MC100EP16VTDR2 PDF预览

MC100EP16VTDR2

更新时间： 2024-11-16 03:28:27
品牌 Logo 应用领域
安森美 - ONSEMI 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
12页 171K
描述
3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing and Internal Input Termination

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MC100EP16VTDR2 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP8,.25
针数：8Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.63Is Samacsys：N
其他特性：CAN ALSO OPERATE WITH -3V TO -5.5V SUPPLY IN NECL MODE差分输出：YES
驱动器位数：1输入特性：DIFFERENTIAL
接口集成电路类型：LINE TRANSCEIVER接口标准：GENERAL PURPOSE
JESD-30 代码：R-PDSO-G8JESD-609代码：e0
长度：4.9 mm湿度敏感等级：1
标称负供电电压：-4.5 V功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：235电源：-4.5 V
认证状态：Not Qualified最大接收延迟：0.35 ns
接收器位数：1座面最大高度：1.75 mm
子类别：Line Driver or Receivers最大压摆率：48 mA
最大供电电压：5.5 V最小供电电压：3 V
标称供电电压：3.3 V表面贴装：YES
技术：ECL温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED最大传输延迟：0.35 ns
宽度：3.9 mmBase Number Matches：1

MC100EP16VTDR2 数据手册

 浏览型号MC100EP16VTDR2的Datasheet PDF文件第2页浏览型号MC100EP16VTDR2的Datasheet PDF文件第3页浏览型号MC100EP16VTDR2的Datasheet PDF文件第4页浏览型号MC100EP16VTDR2的Datasheet PDF文件第5页浏览型号MC100EP16VTDR2的Datasheet PDF文件第6页浏览型号MC100EP16VTDR2的Datasheet PDF文件第7页 
MC100EP16VT  
3.3V / 5VꢀECL Differential  
Receiver/Driver with  
Variable Output Swing and  
Internal Input Termination  
http://onsemi.com  
MARKING DIAGRAMS*  
Description  
The MC100EP16VT is a differential receiver functionally equivalent  
to the 100EP16 with input pins controlling the amplitude of the outputs  
(pin 1) and providing an internal termination network (pin 4).  
8
The V  
input pin controls the output amplitude of the EP16VT  
CTRL  
8
KEP63  
ALYW  
G
and is referenced to V . (See Figure 4.) The operational range of the  
CC  
1
V
CTRL  
input is from ꢀ V (a supply at V −1.42 V, maximum  
BB CC  
output amplitude) to V (minimum output amplitude). V is an  
externally supplied voltage equal to V −1.42 V (See Figures 2  
and Figure 3). A variable resistor between V and V , with the  
SOIC−8  
D SUFFIX  
CASE 751  
CC  
BB  
1
CC  
CC  
BB  
wiper driving V  
application circuits and a V  
, can control the output amplitude. Typical  
CTRL  
Voltage vs. Output Amplitude graph  
CTRL  
8
1
8
are described in this data sheet. When left open, the V  
pin will be  
CTRL  
1
internally pulled down to V and operate as a standard EP16, with  
KP63  
EE  
ALYWG  
100% output amplitude.  
TSSOP−8  
DT SUFFIX  
CASE 948R  
G
The V input pin offers an internal termination network for a 50 W  
TT  
line impedance environment, shown in Figure 1. For further reference,  
see Application Note AND8020, Termination of ECL Logic Devices.  
Input considerations are required for D and D under no signal conditions  
to prevent instability.  
Special considerations are required for differential inputs under No  
Signal conditions to prevent instability.  
1
4
DFN8  
MN SUFFIX  
CASE 506AA  
Features  
• 220 ps Propagation Delay  
• Maximum Frequency > 4 GHz Typical (See Graph)  
• The 100 Series Contains Temperature Compensation  
A
L
= Assembly Location  
= Wafer Lot  
• PECL Mode Operating Range: V = 3.0 V to 5.5 V  
Y
W
M
G
= Year  
= Work Week  
= Date Code  
CC  
with V = 0 V  
EE  
• NECL Mode Operating Range: V = 0 V  
CC  
= Pb−Free Package  
with V = −3.0 V to −5.5 V  
EE  
(Note: Microdot may be in either location)  
• Open Input Default State  
• 50 W Internal Termination Resistor  
• Pb−Free Packages are Available  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 9 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 − Rev. 3  
MC100EP16VT/D  
1234567...12

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MC100EP16VTDR2 替代型号

型号 品牌 替代类型 描述 数据表
MC100EP16VTDR2G ONSEMI

完全替代

 3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing and Internal Input T

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