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MC100EP16VSDT PDF预览

MC100EP16VSDT

更新时间： 2024-11-16 21:17:15
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管
页数 文件大小 规格书
11页 173K
描述
LINE TRANSCEIVER, PDSO8, TSSOP-8

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中文翻译

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MC100EP16VSDT 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：TSSOP, TSSOP8,.19
针数：8Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：8.24其他特性：CAN ALSO OPERATE WITH -3V TO -5.5V SUPPLY IN NECL MODE
差分输出：YES驱动器位数：1
输入特性：DIFFERENTIAL接口集成电路类型：LINE TRANSCEIVER
接口标准：GENERAL PURPOSEJESD-30 代码：R-PDSO-G8
JESD-609代码：e0长度：3 mm
标称负供电电压：-4.5 V功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP8,.19
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：240电源：-4.5 V
认证状态：Not Qualified最大接收延迟：0.28 ns
接收器位数：1座面最大高度：1.1 mm
子类别：Line Driver or Receivers最大压摆率：48 mA
最大供电电压：5.5 V最小供电电压：3 V
标称供电电压：3.3 V表面贴装：YES
技术：ECL温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn90Pb10)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30最大传输延迟：0.28 ns
宽度：3 mmBase Number Matches：1

MC100EP16VSDT 数据手册

 浏览型号MC100EP16VSDT的Datasheet PDF文件第2页浏览型号MC100EP16VSDT的Datasheet PDF文件第3页浏览型号MC100EP16VSDT的Datasheet PDF文件第4页浏览型号MC100EP16VSDT的Datasheet PDF文件第5页浏览型号MC100EP16VSDT的Datasheet PDF文件第6页浏览型号MC100EP16VSDT的Datasheet PDF文件第7页 
MC100EP16VS  
3.3ꢀV / 5ꢀVꢁECL Differential  
Receiver/Driver with  
Variable Output Swing  
Description  
www.onsemi.com  
The MC100EP16VS is a differential receiver with variable output  
amplitude. The device is functionally equivalent to the 100EP16 with  
an input pin that controls the amplitude of the outputs.  
8
The V  
input pin controls the output amplitude of the EP16VS  
8
CTRL  
and is referenced to V . (See Figure 4.) The operational range of the  
1
1
CC  
V
input is from ≤ V (max output amplitude) to V (min  
CTRL  
BB CC  
output amplitude) (See Figure 3). A variable resistor between the V  
SOIC−8 NB  
D SUFFIX  
CASE 751−07  
TSSOP−8  
DT SUFFIX  
CASE 948R−02  
CC  
and V pins, with the wiper driving V  
amplitude. Typical application circuits and a V  
, can control the output  
BB  
CTRL  
Voltage vs.  
CTRL  
Output Amplitude graph are described in this data sheet. When left  
open, the V pin will be internally pulled down to V and operate  
as a standard EP16, with 100% output amplitude.  
CTRL  
EE  
MARKING DIAGRAMS*  
The V pin, an internally generated voltage supply, is available to  
BB  
this device only. For Single-Ended input conditions, the unused  
8
8
differential input is connected to V as a switching reference voltage.  
BB  
KEP62  
ALYW  
KP62  
V
BB  
may also rebias AC coupled inputs. When used, decouple V  
BB  
ALYWG  
G
and V via a 0.01ꢀ ꢁ F capacitor and limit current sourcing or sinking  
CC  
G
1
1
to 0.5 mA. When not used, V should be left open.  
BB  
SOIC−8 NB  
TSSOP−8  
Features  
• 220 ps Propagation Delay  
A
L
Y
W
M
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Date Code  
= Pb-Free Package  
• Maximum Frequency = > 4 GHz Typical (See Graph)  
• The 100 Series Contains Temperature Compensation  
• PECL Mode Operating Range:  
V
CC  
= 3.0 V to 5.5 V with V = 0 V  
EE  
• NECL Mode Operating Range:  
= 0 V with V = −3.0 V to −5.5 V  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
V
CC  
EE  
• Open Input Default State  
• Q Output Will Default LOW with Inputs Open or at V  
EE  
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant  
ORDERING INFORMATION  
Device  
Package  
Shipping†  
MC100EP16VSDG  
SOIC−8 NB  
98 Units / Tube  
(Pb-Free)  
MC100EP16VSDR2G  
MC100EP16VSDTG  
MC100EP16VSDTR2G  
2500 Tape & Reel  
100 Units / Tube  
2500 Tape & Reel  
SOIC−8 NB  
(Pb-Free)  
TSSOP−8  
(Pb-Free)  
TSSOP−8  
(Pb-Free)  
†For information on tape and reel specifications, in-  
cluding part orientation and tape sizes, please refer  
to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
© Semiconductor Components Industries, LLC, 2016  
1
Publication Order Number:  
August, 2016 − Rev. 7  
MC100EP16VS/D  
1234567...11

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