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Datasheet > 驱动程序和接口 > 线路驱动器或接收器> MC100EP16VBMNR4
MC100EP16VBMNR4 PDF预览

MC100EP16VBMNR4

更新时间： 2024-09-29 03:20:39
品牌 Logo 应用领域
安森美 - ONSEMI 线路驱动器或接收器驱动程序和接口接口集成电路
页数 文件大小 规格书
10页 151K
描述
3.3V / 5V ECL Differential Receiver/Driver with High and Low Gain

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中文翻译

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MC100EP16VBMNR4 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：DFN
包装说明：DFN-8针数：8
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.38
其他特性：CAN ALSO OPERATE WITH -3V TO -5.5V SUPPLY IN NECL MODE差分输出：YES
驱动器位数：1高电平输入电流最大值：0.00015 A
输入特性：DIFFERENTIAL接口集成电路类型：LINE TRANSCEIVER
接口标准：GENERAL PURPOSEJESD-30 代码：S-XDSO-N8
JESD-609代码：e0长度：2 mm
标称负供电电压：-4.5 V功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：VSON封装等效代码：SOLCC8,.08,20
封装形状：SQUARE封装形式：SMALL OUTLINE, VERY THIN PROFILE
峰值回流温度（摄氏度）：240电源：-4.5 V
认证状态：Not Qualified最大接收延迟：0.4 ns
接收器位数：1座面最大高度：1 mm
子类别：Line Driver or Receivers最大压摆率：52 mA
最大供电电压：5.5 V最小供电电压：3 V
标称供电电压：3.3 V表面贴装：YES
技术：ECL温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：NO LEAD
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30最大传输延迟：0.4 ns
宽度：2 mmBase Number Matches：1

MC100EP16VBMNR4 数据手册

 浏览型号MC100EP16VBMNR4的Datasheet PDF文件第2页浏览型号MC100EP16VBMNR4的Datasheet PDF文件第3页浏览型号MC100EP16VBMNR4的Datasheet PDF文件第4页浏览型号MC100EP16VBMNR4的Datasheet PDF文件第5页浏览型号MC100EP16VBMNR4的Datasheet PDF文件第6页浏览型号MC100EP16VBMNR4的Datasheet PDF文件第7页 
MC100EP16VB  
3.3Vꢀ/ꢀ5VꢁECL Differential  
Receiver/Driver with High  
and Low Gain  
Description  
http://onsemi.com  
MARKING DIAGRAMS*  
The EP16VB is a world−class differential receiver/driver. The  
device is functionally equivalent to the EP16 and LVEP16 devices but  
with both high and low gain outputs. Q and Q outputs have a DC  
HG  
HG  
gain several times larger than the DC gain of an EP16. Q output is  
provided for feedback purposes.  
8
KEP65  
ALYW  
G
SOIC−8  
D SUFFIX  
CASE 751  
The V pin, an internally generated voltage supply, is available to  
BB  
8
this device only. For single-ended input conditions, the unused  
1
1
differential input is connected to V as a switching reference voltage.  
1
BB  
V
BB  
may also rebias AC coupled inputs. When used, decouple V  
BB  
and V via a 0.01 mF capacitor and limit current sourcing or sinking  
CC  
8
1
to 0.5 mA. When not used, V should be left open.  
BB  
TSSOP−8  
DT SUFFIX  
CASE 948R  
KP65  
8
Special considerations are required for differential inputs under No  
Signal conditions to prevent instability.  
The 100 Series contains temperature compensation.  
ALYWG  
G
Features  
• Gain > 200  
• Maximum Frequency > 3 GHz Typical  
DFN8  
MN SUFFIX  
CASE 506AA  
1
4
• PECL Mode Operating Range: V = 3.0 V to 5.5 V  
CC  
with V = 0 V  
EE  
A
L
Y
W
M
G
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Date Code  
= Pb−Free Package  
• NECL Mode Operating Range: V = 0 V  
CC  
with V = −3.0 V to −5.5 V  
EE  
• V Output  
BB  
• Pb−Free Packages are Available  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 − Rev. 4  
MC100EP16VB/D  
1234567...10

中文翻译

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