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MC100EP16FDT PDF预览

MC100EP16FDT

更新时间: 2024-09-29 05:22:27
品牌 Logo 应用领域
安森美 - ONSEMI 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
10页 151K
描述
3.3V / 5V ECL Differential Receiver/Driver With Reduced Output Swing

MC100EP16FDT 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:PLASTIC, TSSOP-8
针数:8Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.6
Is Samacsys:N其他特性:CAN ALSO OPERATE WITH -3V TO -5.5V SUPPLY IN NECL MODE
差分输出:YES驱动器位数:1
输入特性:DIFFERENTIAL接口集成电路类型:LINE TRANSCEIVER
接口标准:GENERAL PURPOSEJESD-30 代码:R-PDSO-G8
JESD-609代码:e0长度:3 mm
标称负供电电压:-4.5 V功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.19
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240电源:-4.5 V
认证状态:Not Qualified最大接收延迟:0.26 ns
接收器位数:1座面最大高度:1.1 mm
子类别:Line Driver or Receivers最大压摆率:40 mA
最大供电电压:5.5 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:ECL温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn90Pb10)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30最大传输延迟:0.26 ns
宽度:3 mmBase Number Matches:1

MC100EP16FDT 数据手册

 浏览型号MC100EP16FDT的Datasheet PDF文件第2页浏览型号MC100EP16FDT的Datasheet PDF文件第3页浏览型号MC100EP16FDT的Datasheet PDF文件第4页浏览型号MC100EP16FDT的Datasheet PDF文件第5页浏览型号MC100EP16FDT的Datasheet PDF文件第6页浏览型号MC100EP16FDT的Datasheet PDF文件第7页 
MC100EP16F  
3.3V / 5VꢀECL Differential  
Receiver/Driver With  
Reduced Output Swing  
Description  
http://onsemi.com  
MARKING DIAGRAMS*  
The MC100EP16F is a differential receiver/driver. The device is  
functionally equivalent to the EP16 device with higher performance  
capabilities. With reduced output swings, rise/fall transition times are  
significantly faster than on the EP16. The EP16F is ideally suited for  
interfacing with high frequency sources.  
8
8
KEP60  
ALYW  
G
The V pin, an internally generated voltage supply, is available to  
BB  
1
this device only. For singleended input conditions, the unused  
differential input is connected to V as a switching reference voltage.  
SOIC8  
D SUFFIX  
CASE 751  
1
BB  
V
BB  
may also rebias AC coupled inputs. When used, decouple V  
BB  
and V via a 0.01 mF capacitor and limit current sourcing or sinking  
CC  
to 0.5 mA. When not used, V should be left open.  
BB  
8
1
8
Features  
1
KP60  
100 ps Typical Rise and Fall Time  
Max Frequency >4 GHz Typical  
The 100 Series Contains Temperature Compensation  
ALYWG  
TSSOP8  
DT SUFFIX  
CASE 948R  
G
PECL Mode Operating Range: V = 3.0 V to 5.5 V  
CC  
with V = 0 V  
EE  
NECL Mode Operating Range: V = 0V  
CC  
with V = 3.0 V to 5.5 V  
EE  
Open Input Default State  
Safety Clamp on Inputs  
PbFree Packages are Available  
1
4
DFN8  
MN SUFFIX  
CASE 506AA  
A
L
= Assembly Location  
= Wafer Lot  
Y
W
M
G
= Year  
= Work Week  
= Date Code  
= PbFree Package  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 4  
MC100EP16F/D  

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