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MC100EP01DTR2 PDF预览

MC100EP01DTR2

更新时间: 2024-11-04 23:01:31
品牌 Logo 应用领域
安森美 - ONSEMI 栅极
页数 文件大小 规格书
10页 84K
描述
3.3V / 5V ECL 4-Input OR/NOR

MC100EP01DTR2 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:TSSOP, TSSOP8,.19
针数:8Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.47
Is Samacsys:NBase Number Matches:1

MC100EP01DTR2 数据手册

 浏览型号MC100EP01DTR2的Datasheet PDF文件第2页浏览型号MC100EP01DTR2的Datasheet PDF文件第3页浏览型号MC100EP01DTR2的Datasheet PDF文件第4页浏览型号MC100EP01DTR2的Datasheet PDF文件第5页浏览型号MC100EP01DTR2的Datasheet PDF文件第6页浏览型号MC100EP01DTR2的Datasheet PDF文件第7页 
MC10EP01, MC100EP01  
3.3V / 5VꢀECL 4−Input  
OR/NOR  
The MC10EP01 is a 4−input OR/NOR gate. The device is  
functionally equivalent to the EL01 device, LVEL01, and E101 (a  
quad version). With AC performance much faster than the LVEL01  
device, the EP01 is ideal for applications requiring the fastest AC  
performance available.  
http://onsemi.com  
The 100 Series contains temperature compensation.  
MARKING DIAGRAMS*  
230 ps Typical Propagation Delay  
Maximum Frequency > 3 GHz Typical  
PECL Mode Operating Range:  
8
1
8
8
HEP01  
ALYW  
KEP01  
ALYW  
1
V
= 3.0 V to 5.5 V with V = 0 V  
CC  
EE  
SOIC−8  
D SUFFIX  
CASE 751  
NECL Mode Operating Range:  
= 0 V with V = −3.0 V to −5.5 V  
1
V
CC  
EE  
Open Input Default State  
Pb−Free Package is Available  
8
8
8
1
HP01  
KP01  
ALYW  
ALYW  
TSSOP−8  
DT SUFFIX  
CASE 948R  
1
1
H
K
A
L
= MC10  
= MC100  
= Assembly Location  
= Wafer Lot  
Y
W
= Year  
= Work Week  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
Semiconductor Components Industries, LLC, 2004  
1
Publication Order Number:  
June, 2004 − Rev. 6  
MC10EP01/D  

MC100EP01DTR2 替代型号

型号 品牌 替代类型 描述 数据表
MC100EP01DTG ONSEMI

完全替代

3.3V / 5V ECL 4−Input OR/NOR
MC10EP01DTG ONSEMI

完全替代

3.3V / 5V ECL 4−Input OR/NOR
MC100EP01DT ONSEMI

完全替代

3.3V / 5V ECL 4-Input OR/NOR

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