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MC100EL52DR2 PDF预览

MC100EL52DR2

更新时间: 2024-01-22 05:53:55
品牌 Logo 应用领域
安森美 - ONSEMI 触发器锁存器逻辑集成电路光电二极管时钟
页数 文件大小 规格书
3页 86K
描述
Differential Data and Clock D Flip-Flop

MC100EL52DR2 技术参数

是否无铅: 不含铅生命周期:Lifetime Buy
零件包装代码:SOIC包装说明:SOP, SOP8,.25
针数:8Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.09Is Samacsys:N
其他特性:NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V系列:100EL
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.9 mm逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:2200000000 Hz湿度敏感等级:1
位数:1功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C输出特性:OPEN-EMITTER
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:-4.5 V最大电源电流(ICC):29 mA
Prop。Delay @ Nom-Sup:0.51 ns传播延迟(tpd):0.465 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:FF/Latches最大供电电压 (Vsup):5.7 V
最小供电电压 (Vsup):4.2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:ECL
温度等级:INDUSTRIAL端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
触发器类型:POSITIVE EDGE宽度:3.9 mm
最小 fmax:2200 MHzBase Number Matches:1

MC100EL52DR2 数据手册

 浏览型号MC100EL52DR2的Datasheet PDF文件第2页浏览型号MC100EL52DR2的Datasheet PDF文件第3页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10EL/100EL52 is a differential data, differential clock D flip-flop  
with reset. The device is functionally equivalent to the E452 device with  
higher performance capabilities. With propagation delays and output  
transition times significantly faster than the E452 the EL52 is ideally  
suited for those applications which require the ultimate in AC  
performance.  
8
Data enters the master portion of the flip-flop when the clock is LOW  
and is transferred to the slave, and thus the outputs, upon a positive  
transition of the clock. The differential clock inputs of the EL52 allow the  
device to also be used as a negative edge triggered device.  
1
D SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751-05  
The EL52 employs input clamping circuitry so that under open input  
conditions (pulled down to V ) the outputs of the device will remain  
EE  
stable.  
365ps Propagation Delay  
2.0GHz Toggle Frequency  
75kInternal Input Pulldown Resistors  
>1000V ESD Protection  
PIN DESCRIPTION  
FUNCTION  
PIN  
LOGIC DIAGRAM AND PINOUT ASSIGNMENT  
D
CLK  
Q
Data Input  
Clock Input  
Data Output  
D 1  
8
7
V
CC  
TRUTH TABLE  
D
D
2
3
Q
Q
D
L
CLK  
Z
Q
L
Flip-Flop  
CLK  
6
5
H
Z
H
Z = LOW to HIGH Transition  
CLK  
4
V
EE  
12/93  
Motorola, Inc. 1996  
REV 2  

MC100EL52DR2 替代型号

型号 品牌 替代类型 描述 数据表
MC100EL52DR2G ONSEMI

完全替代

5V ECL Differential Data and Clock D Flip-Flop
MC10EL35DR2G ONSEMI

类似代替

5V ECL JK Flip-Flop

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