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MC100EL01DT PDF预览

MC100EL01DT

更新时间: 2024-11-20 05:10:27
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
9页 144K
描述
5V ECL 4-Input OR/NOR

MC100EL01DT 数据手册

 浏览型号MC100EL01DT的Datasheet PDF文件第2页浏览型号MC100EL01DT的Datasheet PDF文件第3页浏览型号MC100EL01DT的Datasheet PDF文件第4页浏览型号MC100EL01DT的Datasheet PDF文件第5页浏览型号MC100EL01DT的Datasheet PDF文件第6页浏览型号MC100EL01DT的Datasheet PDF文件第7页 
MC10EL01, MC100EL01  
5VꢀECL 4-Input OR/NOR  
Description  
The MC10EL/100EL01 is a 4-input OR/NOR gate. The device is  
functionally equivalent to the E101 device with higher performance  
capabilities. With propagation delays and output transition times  
significantly faster than the E101, the EL01 is ideally suited for those  
applications which require the ultimate in AC performance.  
The 100 series contains temperature compensation.  
http://onsemi.com  
MARKING  
DIAGRAMS*  
Features  
230 ps Propagation Delay  
8
8
1
8
1
HEL01  
KEL01  
ALYW  
G
ESD Protection: > 1 kV Human Body Model,  
ALYW  
> 100 V Machine Model  
G
SOIC8  
D SUFFIX  
CASE 751  
PECL Mode Operating Range: V = 4.2 V to 5.7 V  
1
CC  
with V = 0 V  
EE  
NECL Mode Operating Range: V = 0 V  
CC  
8
with V = 4.2 V to 5.7 V  
EE  
8
1
8
1
Internal Input Pulldown Resistors  
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
Moisture Sensitivity Level 1  
For Additional Information, see Application Note AND8003/D  
Flammability Rating: UL 94 V0 @ 0.125 in,  
Oxygen Index: 28 to 34  
HL01  
ALYWG  
G
KL01  
ALYWG  
G
TSSOP8  
DT SUFFIX  
CASE 948R  
1
Transistor Count = 46 devices  
PbFree Packages are Available  
DFN8  
MN SUFFIX  
CASE 506AA  
1
4
1
4
V
8
7
CC  
D
D
1
2
H = MC10  
L
Y
= Wafer Lot  
= Year  
0
1
K
= MC100  
4M= MC10  
2A = MC100  
W = Work Week  
M = Date Code  
G
Q
A
= Assembly Location  
= PbFree Package  
(Note: Microdot may be in either location)  
*For additional marking information, refer to  
Application Note AND8002/D.  
6
5
D
D
3
4
Q
V
2
3
EE  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
Figure 1. Logic Diagram and Pinout Assignment  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
December, 2006 Rev. 5  
MC10EL01/D  

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