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MC100E116 PDF预览

MC100E116

更新时间: 2024-10-01 05:10:27
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
9页 138K
描述
5V ECL Quint Differential Line Receiver

MC100E116 数据手册

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MC10E116, MC100E116  
5VꢀECL Quint Differential  
Line Receiver  
Description  
The MC10E/100E116 is a quint differential line receiver with  
emitter-follower outputs. For applications which require bandwidths  
greater than that of the E116, the E416 device may be of interest.  
Active current sources plus a deep collector feature of the MOSAIC  
III process provide the receivers with excellent common-mode noise  
http://onsemi.com  
rejection. Each receiver has a dedicated V  
optimum symmetry and stability.  
supply lead, providing  
CCO  
If both inverting and non-inverting inputs are at an equal potential of  
> 2.5 V, the receiver does not go to a defined state, but rather  
current-shares in normal differential amplifier fashion, producing  
output voltage levels midway between HIGH and LOW, or the device  
may even oscillate.  
PLCC28  
FN SUFFIX  
CASE 776  
The V pin, an internally generated voltage supply, is available to  
BB  
this device only. For single-ended input conditions, the unused  
differential input is connected to V as a switching reference voltage.  
BB  
V
may also rebias AC coupled inputs. When used, decouple V  
CC  
BB  
BB  
MARKING DIAGRAM*  
and V via a 0.01 mF capacitor and limit current sourcing or sinking  
to 0.5 mA. When not used, V should be left open.  
1
BB  
The 100 Series contains temperature compensation.  
MCxxxE116G  
AWLYYWW  
Features  
500 ps Max. Propagation Delay  
V Supply Output  
BB  
Dedicated V  
Pin for Each Receiver  
CCO  
xxx  
A
WL  
YY  
WW  
G
= 10 or 100  
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
PECL Mode Operating Range: V = 4.2 V to 5.7 V  
CC  
with V = 0 V  
EE  
NECL Mode Operating Range: V = 0 V  
CC  
with V = 4.2 V to 5.7 V  
EE  
Output Qs will default low when inputs are < V 2.5 V  
CC  
Internal Input 50 kW Pulldown Resistors  
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
ESD Protection: Human Body Model; > 2 kV,  
Machine Model; > 200 V  
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 7 of this data sheet.  
Moisture Sensitivity Level:  
Pb = 1  
PbFree = 3  
For Additional Information, see Application Note AND8003/D  
Flammability Rating: UL 94 V0 @ 0.125 in,  
Oxygen Index: 28 to 34  
Transistor Count = 98 devices  
PbFree Packages are Available*  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 Rev. 10  
MC10E116/D  

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