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MBM29LV160T-12PN PDF预览

MBM29LV160T-12PN

更新时间: 2024-11-05 22:19:23
品牌 Logo 应用领域
富士通 - FUJITSU /
页数 文件大小 规格书
60页 732K
描述
16M (2M xⅴ 8/1M x 16) BIT

MBM29LV160T-12PN 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SON包装说明:PLASTIC, SON-46
针数:46Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.77最长访问时间:120 ns
其他特性:SECTOR ERASE; 100000 PROGRAM/ERASE CYCLES; TOP BOOT; CAN BE ORGANIZED AS 1M X 16备用内存宽度:8
启动块:TOP命令用户界面:YES
通用闪存接口:YES数据轮询:YES
JESD-30 代码:R-PDSO-N46JESD-609代码:e0
长度:12 mm内存密度:16777216 bit
内存集成电路类型:FLASH内存宽度:16
功能数量:1部门数/规模:1,2,1,31
端子数量:46字数:1048576 words
字数代码:1000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:1MX16封装主体材料:PLASTIC/EPOXY
封装代码:VSON封装等效代码:SOLCC46,.4,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3/3.3 V编程电压:3 V
认证状态:Not Qualified就绪/忙碌:YES
座面最大高度:0.75 mm部门规模:16K,8K,32K,64K
最大待机电流:0.000005 A子类别:Flash Memories
最大压摆率:0.035 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
切换位:YES类型:NOR TYPE
宽度:10 mmBase Number Matches:1

MBM29LV160T-12PN 数据手册

 浏览型号MBM29LV160T-12PN的Datasheet PDF文件第2页浏览型号MBM29LV160T-12PN的Datasheet PDF文件第3页浏览型号MBM29LV160T-12PN的Datasheet PDF文件第4页浏览型号MBM29LV160T-12PN的Datasheet PDF文件第5页浏览型号MBM29LV160T-12PN的Datasheet PDF文件第6页浏览型号MBM29LV160T-12PN的Datasheet PDF文件第7页 
FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS05-20846-4E  
FLASH MEMORY  
CMOS  
16M (2M × 8/1M × 16) BIT  
-80/-90/-12  
-80/-90/-12  
/MBM29LV160B  
MBM29LV160T  
FEATURES  
• Single 3.0 V read, program and erase  
Minimizes system level power requirements  
• Compatible with JEDEC-standard commands  
Uses same software commands as E2PROMs  
• Compatible with JEDEC-standard world-wide pinouts  
48-pin TSOP (I) (Package suffix: PFTN-Normal Bend Type, PFTR-Reversed Bend Type)  
46-pin SON (Package suffix: PN)  
48-pin CSOP (Package suffix: PCV)  
48-ball FBGA (Package suffix: PBT)  
• Minimum 100,000 program/erase cycles  
• High performance  
80 ns maximum access time  
• Sector erase architecture  
One 8K word, two 4K words, one 16K word, and thirty-one 32K words sectors in word mode  
One 16K byte, two 8K bytes, one 32K byte, and thirty-one 64K bytes sectors in byte mode  
Any combination of sectors can be concurrently erased. Also supports full chip erase  
• Boot Code Sector Architecture  
T = Top sector  
B = Bottom sector  
• Embedded EraseTM Algorithms  
Automatically pre-programs and erases the chip or any sector  
• Embedded programTM Algorithms  
Automatically programs and verifies data at specified address  
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion  
• Ready/Busy output (RY/BY)  
Hardware method for detection of program or erase cycle completion  
• Automatic sleep mode  
When addresses remain stable, automatically switches themselves to low power mode  
• Low VCC write inhibit 2.5 V  
(Continued)  
Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.  

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