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MBM29LV160T-12PFTY PDF预览

MBM29LV160T-12PFTY

更新时间: 2024-11-05 22:19:23
品牌 Logo 应用领域
富士通 - FUJITSU /
页数 文件大小 规格书
60页 732K
描述
16M (2M xⅴ 8/1M x 16) BIT

MBM29LV160T-12PFTY 数据手册

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FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS05-20846-4E  
FLASH MEMORY  
CMOS  
16M (2M × 8/1M × 16) BIT  
-80/-90/-12  
-80/-90/-12  
/MBM29LV160B  
MBM29LV160T  
FEATURES  
• Single 3.0 V read, program and erase  
Minimizes system level power requirements  
• Compatible with JEDEC-standard commands  
Uses same software commands as E2PROMs  
• Compatible with JEDEC-standard world-wide pinouts  
48-pin TSOP (I) (Package suffix: PFTN-Normal Bend Type, PFTR-Reversed Bend Type)  
46-pin SON (Package suffix: PN)  
48-pin CSOP (Package suffix: PCV)  
48-ball FBGA (Package suffix: PBT)  
• Minimum 100,000 program/erase cycles  
• High performance  
80 ns maximum access time  
• Sector erase architecture  
One 8K word, two 4K words, one 16K word, and thirty-one 32K words sectors in word mode  
One 16K byte, two 8K bytes, one 32K byte, and thirty-one 64K bytes sectors in byte mode  
Any combination of sectors can be concurrently erased. Also supports full chip erase  
• Boot Code Sector Architecture  
T = Top sector  
B = Bottom sector  
• Embedded EraseTM Algorithms  
Automatically pre-programs and erases the chip or any sector  
• Embedded programTM Algorithms  
Automatically programs and verifies data at specified address  
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion  
• Ready/Busy output (RY/BY)  
Hardware method for detection of program or erase cycle completion  
• Automatic sleep mode  
When addresses remain stable, automatically switches themselves to low power mode  
• Low VCC write inhibit 2.5 V  
(Continued)  
Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.  

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