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MBM29F800TA-55PFTR PDF预览

MBM29F800TA-55PFTR

更新时间: 2024-09-20 22:08:23
品牌 Logo 应用领域
富士通 - FUJITSU 内存集成电路光电二极管
页数 文件大小 规格书
48页 516K
描述
8M (1M X 8/512K X 16) BIT

MBM29F800TA-55PFTR 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:TSOP1包装说明:PLASTIC, REVERSE, TSOP1-48
针数:48Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.31最长访问时间:55 ns
其他特性:MINIMUM 100K WRITE/ERASE CYCLES备用内存宽度:8
启动块:TOP命令用户界面:YES
数据轮询:YES耐久性:100000000 Write/Erase Cycles
JESD-30 代码:R-PDSO-G48JESD-609代码:e0
长度:18.4 mm内存密度:8388608 bit
内存集成电路类型:FLASH内存宽度:16
功能数量:1部门数/规模:1,2,1,15
端子数量:48字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:512KX16封装主体材料:PLASTIC/EPOXY
封装代码:TSOP1-R封装等效代码:TSSOP48,.8,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL电源:5 V
编程电压:5 V认证状态:Not Qualified
就绪/忙碌:YES反向引出线:YES
座面最大高度:1.2 mm部门规模:16K,8K,32K,64K
最大待机电流:0.000005 A子类别:Flash Memories
最大压摆率:0.05 mA最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL切换位:YES
类型:NOR TYPE宽度:12 mm

MBM29F800TA-55PFTR 数据手册

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FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS05-20841-4E  
FLASH MEMORY  
CMOS  
8M (1M × 8/512K × 16) BIT  
MBM29F800TA-55/-70/-90/MBM29F800BA-55/-70/-90  
FEATURES  
• Single 5.0 V read, write, and erase  
Minimizes system level power requirements  
• Compatible with JEDEC-standard commands  
Uses same software commands as E2PROMs  
• Compatible with JEDEC-standard world-wide pinouts  
48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)  
44-pin SOP (Package suffix: PF)  
• Minimum 100,000 write/erase cycles  
• High performance  
55 ns maximum access time  
• Sector erase architecture  
One 16K byte, two 8K bytes, one 32K byte, and fifteen 64K bytes.  
Any combination of sectors can be concurrently erased. Also supports full chip erase.  
• Boot Code Sector Architecture  
T = Top sector  
B = Bottom sector  
• Embedded EraseTM Algorithms  
Automatically pre-programs and erases the chip or any sector  
• Embedded ProgramTM Algorithms  
Automatically writes and verifies data at specified address  
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion  
• Ready/Busy output (RY/BY)  
Hardware method for detection of program or erase cycle completion  
• Low Vcc write inhibit 3.2 V  
• Erase Suspend/Resume  
Suspends the erase operation to allow a read data in another sector within the same device  
• Hardware RESET pin  
Resets internal state machine to the read mode  
• Sector protection  
Hardware method disables any combination of sectors from write or erase operations  
• Temporary sector unprotection  
Temporary sector unprotection via the RESET pin.  
Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.  

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