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MBM29F040C-70 PDF预览

MBM29F040C-70

更新时间: 2024-11-02 22:58:07
品牌 Logo 应用领域
富士通 - FUJITSU /
页数 文件大小 规格书
40页 411K
描述
4M (512K X 8) BIT

MBM29F040C-70 数据手册

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FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS05-20842-4E  
FLASH MEMORY  
CMOS  
4M (512K × 8) BIT  
MBM29F040C-55/-70/-90  
FEATURES  
Single 5.0 V read, program and erase  
Minimizes system level power requirements  
Compatible with JEDEC-standard commands  
Uses same software commands as E2PROMs  
Compatible with JEDEC-standard byte-wide pinouts  
32-pin PLCC (Package suffix: PD)  
32-pin TSOP(I) (Package suffix: PF)  
32-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)  
Minimum 100,000 write/erase cycles  
High performance  
55 ns maximum access time  
Sector erase architecture  
8 equal size sectors of 64K bytes each  
Any combination of sectors can be concurrently erased. Also supports full chip erase.  
Embedded Erase™ Algorithms  
Automatically pre-programs and erases the chip or any sector  
Embedded Program™ Algorithms  
Automatically writes and verifies data at specified address  
Data Polling and Toggle Bit feature for detection of program or erase cycle completion  
Low VCC write inhibit 3.2 V  
Sector protection  
Hardware method disables any combination of sectors from write or erase operations  
Erase Suspend/Resume  
Suspends the erase operation to allow a read data in another sector within the same device  
Embedded Erase™, Embedded Program™ and ExpressFlash™ are trademarks of Advanced Micro Devices, Inc.  

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