MAX3782UGK

更新时间： 2024-02-24 06:24:13

品牌	Logo	应用领域
美信 - MAXIM		/
页数	文件大小	规格书
18页	447K
描述
Interface Circuit, Bipolar, 10 X 10 MM, 0.90 MM HEIGHT, QFN-68

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技术参数
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MAX3782UGK 技术参数

生命周期：	Obsolete	零件包装代码：	QFN
包装说明：	VQCCN,	针数：	68
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.82	Is Samacsys：	N
JESD-30 代码：	S-XQCC-N68	JESD-609代码：	e0
长度：	10 mm	功能数量：	1
端子数量：	68	最高工作温度：	85 °C
最低工作温度：	-5 °C	封装主体材料：	UNSPECIFIED
封装代码：	VQCCN	封装形状：	SQUARE
封装形式：	CHIP CARRIER, VERY THIN PROFILE	认证状态：	Not Qualified
座面最大高度：	0.9 mm	标称供电电压：	3.3 V
表面贴装：	YES	技术：	BIPOLAR
电信集成电路类型：	INTERFACE CIRCUIT	温度等级：	OTHER
端子面层：	TIN LEAD	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
宽度：	10 mm	Base Number Matches：	1

MAX3782UGK 数据手册

19-2268; Rev 2; 1/03

Dual 1.25Gbps Transceiver

General Description

Features

ꢀ 1000Base-SX/LX, GBIC, or SFP Serial Data

The MAX3782 is a dual 1.25Gbps data retiming and

clock recovery transceiver. It interfaces 1.25Gbps LVDS

data and clock to a 1.25Gbps serial interface compati-

ble with 1000Base-SX/LX (IEEE 802.3z-2000) standards,

GBIC, and small form-factor pluggable (SFP) module

interface recommendations. The serial differential trans-

mitter and receiver are PECL compatible using an AC-

coupled CML interface with on-chip termination/bias

resistors for superior forward and back terminations. The

transmit path converts the LVDS signaling to CML and

retimes the serial data to a low-jitter reference clock. The

transmitter section contains LVDS buffers, FIFO, clock

multiplier, and CML output buffers. The transmitter

accepts a single 1.25Gbps serial-data channel and a

625MHz double-data-rate (DDR) clock that are compati-

ble with IEEE Std 1596-1996 DC specifications. Serial

LVDS data is clocked into the FIFO on both edges of the

625MHz source-synchronous TCLK. Data is clocked out

of the FIFO using an internal 1.25GHz clock derived

from a low-jitter 125MHz reference. Serial data is then

clocked out as differential CML.

Conversion to/from 1.25Gbps LVDS Serial Data

and DDR Clock

ꢀ CML Interface Exceeds all PECL AC

Specifications for 1000Base-SX/LX, GBIC, or SFP

Serial Data

ꢀ Tx Data Retiming with <0.1UI Total Output Jitter

as per IEEE802.3z

ꢀ Rx Data and Clock Recovery with 0.75UI Jitter

Tolerance as per IEEE802.3z

ꢀ On-Chip Forward and Back Termination Using

CML I/O and Integrated Termination/Bias

Resistors

ꢀ PLL Lock Status Indicator

ꢀ System Loopback

ꢀ JTAG I/O Scan for Board-Level Testing

Ordering Information

The receive path converts the CML signaling to LVDS

and locks on to the data stream to recover the source-

synchronous clock (RCLK). The receive section con-

tains a CML input buffer, clock recovery circuit, and

LVDS output buffers. The receiver accepts a CML serial

data stream. The clock recovery phase-locked loop

(PLL) locks on to the incoming serial data stream and

generates a 625MHz LVDS DDR clock. RCLK edges

are at the center of the “eye” of RDAT data.

PIN-

PACKAGE

PART

TEMP RANGE

PKG CODE

MAX3782UGK -5°C to +85°C 68 QFN-EP*

*EP = exposed pad.

G6800-4

Pin Configuration

TOP VIEW

68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52

Applications

1000Base-SX/LX Optical Links

GND

TCLK2+

TCLK2-

TDAT2+

TDAT2-

GND

51 GND

50 VCC1

49 TXFIL

48 GND

47 VCC4

46 TX2+

45 TX2-

44 VCC4

43 GND

42 VCC4

41 TX1+

40 TX1-

39 VCC4

38 VCC6

37 RXFIL1

36 VCC2

35 GND

GBIC Modules

SFP Fiber Transceiver Modules

TRST-JTAG

VCC5

RCLK2+

MAX3782

RCLK2- 10

RDAT2+ 11

RDAT2- 12

GND 13

LOCK 14

VCC3 15

RXFIL2 16

GND 17

Typical Application Circuit appears at end of data sheet.

18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

QFN*

THE EXPOSED PAD OF THE QFN PACKAGE MUST BE SOLDERED TO GROUND

FOR PROPER THERMAL AND ELECTRICAL OPERATION OF THE MAX3782.

________________________________________________________________ Maxim Integrated Products

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

12 3 4 5 6 7...18

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与MAX3782UGK相关器件

型号	品牌	描述	获取价格	数据表
MAX3782UGK-T	MAXIM	Interface Circuit, Bipolar, 10 X 10 MM, 0.90 MM HEIGHT, QFN-68	获取价格
MAX3783	MAXIM	2.7Gbps Dual Mux/Buffer with Loopback	获取价格
MAX3783	ADI	2.7Gbps双路复用器/缓冲器，带有环回	获取价格
MAX3783EVKIT	MAXIM	Evaluation Kit for the MAX3783	获取价格
MAX3783UCM	MAXIM	FIBER-OPTIC PORT BYPASS\|BIPOLAR\|TQFP\|48PIN\|PLASTIC	获取价格
MAX3783UCM+	MAXIM	2.7Gbps Dual Mux/Buffer with Loopback	获取价格

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