19-1701; Rev 2; 2/01
2.125Gbps, 3.3V
Quad-Port Bypass with Repeater
General Description
Features
The MAX3752 quad-port bypass IC is designed for use
in the Fibre Channel Arbitrated Loop topology. This
device consists of four serially connected port bypass
circuits (PBCs) and a repeater that provides clock and
data recovery (CDR).
ꢀ Four High-Speed Data Ports
ꢀ Meets Fibre Channel Jitter Tolerance
Requirements
ꢀ Large Output Signal Swing (>1000mVp-p)
ꢀ +3.0V to +3.6V Single-Supply Voltage
The quad-port bypass circuit allows connection of up to
four Fibre Channel L-Ports, which can each be enabled
or bypassed by controlling the PBC select inputs.
Additional quad PBCs can be cascaded for applica-
tions requiring more than four L-Ports. To reduce the
external parts count, all signal inputs and outputs have
internal termination resistors.
ꢀ On-Chip Termination Resistors Compatible with
75Ω Transmission Lines at All Ports
The MAX3752 complies with Fibre Channel jitter toler-
ance requirements and can recover data signals with up
to 0.7 unit intervals (UIs) of high-frequency jitter. When
the repeater is not needed, it can be disabled to reduce
power consumption. A fully integrated phase-locked loop
(PLL) provides a frequency lock indication and does not
need an external reference clock.
Ordering Information
PART
TEMP. RANGE
PIN-PACKAGE
MAX3752CCM
0°C to +70°C
48 TQFP-EP*
*EP = Exposed pad
________________________Applications
2.125Gbps Fibre Channel
Fibre Channel Data Storage Systems
Storage Area Networks
Fibre Channel Hubs
Pin Configuration
GND
LIN1-
LIN1+
GND
1
2
3
4
5
6
7
8
9
36 GND
35 LOUT4+
34 LOUT4-
33 GND
Typical Operating Circuit appears at end of data sheet.
LOUT1-
LOUT1+
GND
32 LIN4+
31 LIN4-
MAX3752
30 GND
29 GND
28 OUT-
27 OUT+
26 GND
25 LOCK
GND
IN-
IN+ 10
GND 11
CLKEN 12
TQFP-EP*
* Exposed pad is connected to ground.
________________________________________________________________ Maxim Integrated Products
1
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