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MAX3678

更新时间： 2024-02-23 15:11:10
品牌 Logo 应用领域
美信 - MAXIM 开关
页数 文件大小 规格书
2页 79K
描述
Low-Jitter Frequency Synthesizer with Intelligent Dynamic Switching

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MAX3678 技术参数

生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN,针数：56
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.78模拟集成电路 - 其他类型：PLL FREQUENCY SYNTHESIZER
JESD-30 代码：S-XQCC-N56长度：8 mm
功能数量：1端子数量：56
最高工作温度：85 °C最低工作温度：
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
座面最大高度：0.8 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：BICMOS
温度等级：OTHER端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
宽度：8 mm

MAX3678 数据手册

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Maxim > Products > [Optoelectronics] [Storage Products (SAS/SATA/Enclosure Management)]  
MAX3678  
Low-Jitter Frequency Synthesizer with Intelligent Dynamic Switching  
Industry's Best Jitter Performance Exceeds SerDes Reference Clock Specification  
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Technical Documents  
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Active: In Production.  
Description  
The MAX3678 is a low-jitter frequency synthesizer with intelligent dynamic clock switching optimized for  
systems where redundant clock failover switching is needed. It contains a monolithic phase-locked loop  
(PLL) that accepts two reference clock inputs and generates nine phase-aligned outputs. The device  
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continuously monitors the signal status for both reference clock inputs. In the event that the primary clock fails, the PLL automatically  
switches to the secondary clock input without generating a phase bump at the clock outputs, using a glitchless switchover mechanism. A  
manual switch mode is also provided for user-controlled switching. The device features ultra-low jitter generation of 0.3ps  
RMS  
(integrated 12kHz to 20MHz) and excellent power-supply noise rejection.  
The MAX3678 operates from a single +3.3V supply and typically consumes 400mW. The operating temperature range is from 0°C to  
+85°C, and is available in a 8mm x 8mm, 56-pin TQFN package.  
An evaluation kit is available: MAX3678EVKIT  
Key Features  
z Two Reference Clock Inputs: LVPECL  
z Nine Phase-Aligned Clock Outputs: LVPECL  
z Automatic or Manual Dynamic Switching Between Two Reference Clock Inputs  
z Input Frequencies: 66.67MHz, 133.33MHz, 266.67MHz, 333.33MHz  
z Output Frequencies: 66.67MHz, 133.33MHz, 266.67MHz, 333.33MHz  
z Low-Jitter Generation: 0.3ps  
(12kHz to 20MHz)  
RMS  
z Clock Failure Indicator for Both Reference Clocks  
z External Feedback Provides Zero-Delay Capability  
z Low Output Skew: 20ps Typical  
z Typical Power Dissipation: 400mW at +3.3V  
z Operating Temperature: 0°C to +85°C  
Key Specifications: Clock Generators  
Output  
Jitter  
(ps)  
f
f
f
f
OUT  
IN  
IN  
OUT  
Price  
Fixed or  
Continuous  
Frequency  
V
(MHz) (MHz) (MHz) (MHz)  
Part  
Number  
Output Out-  
Levels puts  
Program- Spread  
mability Spectrum  
SUPPLY  
(V)  
Applications  
PLLs  
Package/Pins  
See  
Notes  
min max min max  
RMS  
General  
Purpose  
$14.66  
@1k  
MAX3678  
66.67 333.33 66.67 333.33  
Fixed  
LVPECL  
9
1
Pin  
No  
0.28  
3.3  
TQFN/56  
See All Clock Generators (27)  
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z Next Day Product Selection Assistance from Applications Engineers  
z Parametric Search  
z Applications Help  
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Technical Documents  
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Key Specifications  
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Price and Availability  
Samples  
Buy Online  
Related Products  
Notes and Comments  
Evaluation Kits  
Engineering Journals  
Package Information  
http://www.maxim-ic.com/quick_view2.cfm/qv_pk/5690  
11/9/2009  
12

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