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MAX3280E_11 PDF预览

MAX3280E_11

更新时间: 2024-11-26 11:17:35
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
10页 177K
描述
±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers

MAX3280E_11 数据手册

 浏览型号MAX3280E_11的Datasheet PDF文件第2页浏览型号MAX3280E_11的Datasheet PDF文件第3页浏览型号MAX3280E_11的Datasheet PDF文件第4页浏览型号MAX3280E_11的Datasheet PDF文件第5页浏览型号MAX3280E_11的Datasheet PDF文件第6页浏览型号MAX3280E_11的Datasheet PDF文件第7页 
19-2320; Rev 1; 3/11  
1ꢀ5k EꢁDꢂ-rotected ꢀ2Mbps, 3k to ꢀ.ꢀk, OT23  
Rꢁꢂ48ꢀ/Rꢁꢂ422 True Failꢂꢁafe Receivers  
01/MAX3284E  
General Description  
Features  
The MAX3280E/MAX3281E/MAX3283E/MAX3284E are  
single receivers designed for RS-485 and RS-422 com-  
munication. These devices guarantee data rates up to  
52Mbps, even with a 3V power supply. Excellent propa-  
gation delay (15ns max) and package-to-package  
skew time (8ns max) make these devices ideal for mul-  
tidrop clock distribution applications.  
ESD Protection:  
±±15k ꢀHumn ꢁoꢂd ꢃoꢂeꢄ  
±ꢅ5k ꢆEꢇ ±ꢈꢈꢈ0-0ꢉ2 ꢇontmct Diꢊcꢋmrꢌe  
±±ꢉ5k ꢆEꢇ ±ꢈꢈꢈ0-0ꢉ2 ꢍir0ꢎma Diꢊcꢋmrꢌe  
ꢎHmrmnteeꢂ 1ꢉꢃbaꢊ Dmtm Rmte  
ꢎHmrmnteeꢂ ±1nꢊ Receiver Proamꢌmtion Deꢄmd  
ꢎHmrmnteeꢂ ꢉnꢊ Receiver S5ew  
The MAX3280E/MAX3281E/MAX3283E/MAX3284E  
have true fail-safe circuitry, which guarantees a logic-  
high receiver output when the receiver inputs are  
opened or shorted. The receiver output will be a logic  
high if all transmitters on a terminated bus are disabled  
(high impedance). These devices feature 1/4-unit-load  
receiver input impedance, allowing up to 128 receivers  
on the same bus.  
ꢎHmrmnteeꢂ 8nꢊ Pmc5mꢌe0to0Pmc5mꢌe S5ew Tiue  
k Pin for ꢇonnection to FPꢎꢍꢊ/ꢍSꢆꢇꢊ  
L
ꢍꢄꢄow Ua to ±ꢉ8 Trmnꢊceiverꢊ on tꢋe ꢁHꢊ  
(±/-0Hnit0ꢄomꢂ)  
Tind SOTꢉ3 Pmc5mꢌe  
The MAX3280E is a single receiver available in a 5-pin  
SOT23 package. The MAX3281E/MAX3283E single  
receivers have a receiver enable (EN or EN) function  
and are offered in a 6-pin SOT23 package. The  
MAX3284E features a voltage logic pin that allows com-  
patibility with low-voltage logic levels, as in digital  
FPGAs/ASICs. On the MAX3284E, the voltage threshold  
TrHe Fmiꢄ0Smfe Receiver  
07k to +±ꢉk ꢇouuon0ꢃoꢂe Rmnꢌe  
3k to 1.1k Power0SHaaꢄd Rmnꢌe  
Enmbꢄe (ꢀiꢌꢋ mnꢂ Low) Pinꢊ for ReꢂHnꢂmnt  
Oaermtion  
for a logic high is user-defined by setting V in the  
L
range from 1.65V to V . The MAX3284E is also  
CC  
Tꢋree0Stmte OHtaHt Stmꢌe (ꢃꢍX3ꢉ8±E/ꢃꢍX3ꢉ83E)  
Tꢋerumꢄ Protection ꢍꢌminꢊt OHtaHt Sꢋort ꢇircHit  
offered in a 6-pin SOT23 package.  
Applications  
Ordering Information  
Clock Distribution  
Telecom Racks  
Base Stations  
PIN-  
TOP  
PART  
TEMP RANGE  
PACKAGE MARK  
MAX3280EAUK+T -40°C to +125°C 5 SOT23-5  
MAX3281EAUT+T -40°C to +125°C 6 SOT23-6  
MAX3283EAUT+T -40°C to +125°C 6 SOT23-6  
MAX3284EAUT+T -40°C to +125°C 6 SOT23-6  
ADVM  
ABAT  
ABAU  
ABAV  
Industrial Control  
Local Area Networks  
+Denotes a lead(Pb)-free/RoHS-compliant package.  
T = Tape and reel.  
Pin ꢇonfiꢌHrmtionꢊ maaemr mt enꢂ of ꢂmtm ꢊꢋeet.  
ꢁelector Guide  
PꢍRT  
k
ENꢍꢁLE  
DꢍTꢍ RꢍTE  
52Mbps  
PꢍꢇKꢍꢎE  
5-Pin SOT23  
6-Pin SOT23  
6-Pin SOT23  
6-Pin SOT23  
L
MAX3280E  
MAX3281E  
MAX3283E  
MAX3284E  
Active High  
Active Low  
52Mbps  
52Mbps  
52Mbps (Note 1)  
Note ±: MAX3284E data rate is dependent on V .  
L
________________________________________________________________ ꢃmxiu ꢆnteꢌrmteꢂ ProꢂHctꢊ  
±
For aricinꢌ2 ꢂeꢄiverd2 mnꢂ orꢂerinꢌ inforumtion2 aꢄemꢊe contmct ꢃmxiu Direct mt ±08880ꢅꢉ90-ꢅ-ꢉ2  
or viꢊit ꢃmxiu’ꢊ webꢊite mt www.umxiu0ic.cou.  

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