19-3758; Rev 0; 8/05
High-Dynamic-Range, 16-Bit,
80Msps ADC with -82dBFS Noise Floor
General Description
Features
The MAX19586 is a 3.3V, high-speed, high-perfor-
mance analog-to-digital converter (ADC) featuring a
fully differential wideband track-and-hold (T/H) and a
16-bit converter core. The MAX19586 is optimized for
multichannel, multimode receivers, which require the
ADC to meet very stringent dynamic performance
requirements. With a -82dBFS noise floor, the
MAX19586 allows for the design of receivers with supe-
rior sensitivity requirements.
ꢀ 80Msps Minimum Sampling Rate
ꢀ -82dBFS Noise Floor
ꢀ Excellent Dynamic Performance
80dB/79.2dB SNR at f = 10MHz/70MHz
IN
and -2dBFS
96dBc/102dBc Single-Tone SFDR1/
SFDR2 at f = 10MHz
IN
84.3dBc/100dBc Single-Tone SFDR1/
SFDR2 at f = 70MHz
IN
ꢀ Less than 0.1ps Sampling Jitter
ꢀ 1.1W Power Dissipation
At 80Msps, the MAX19586 achieves a 79.2dB signal-to-
noise ratio (SNR) and an 84.3dBc/100dBc single-tone
spurious-free dynamic range (SFDR) performance
ꢀ 2.56V
Fully Differential Analog Input Voltage
P-P
Range
(SFDR1/SFDR2) at f = 70MHz. The MAX19586 is not
IN
ꢀ CMOS-Compatible Two’s-Complement Data
Output
ꢀ Separate Data Valid Clock and Over-Range
Outputs
ꢀ Flexible Input Clock Buffer
ꢀ 3.3V Analog Power Supply; 1.8V Digital Output
Supply
ꢀ Small 8mm x 8mm x 0.8mm 56-Pin Thin QFN
Package
only optimized for excellent dynamic performance in
the 2nd Nyquist region, but also for high-IF input fre-
quencies. For instance, at 130MHz, the MAX19586
achieves an 82.5dBc SFDR and its SNR performance
stays flat (within 2.5dB) throughout the 4th Nyquist
region. This level of performance makes the part ideal
for high-performance digital receivers.
The MAX19586 operates from a 3.3V analog supply
voltage and a 1.8V digital voltage, features a 2.56V
P-P
ꢀ EV Kit Available for MAX19586
(Order MAX19586EVKIT)
full-scale input range, and allows for a guaranteed sam-
pling speed of up to 80Msps. The input track-and-hold
stage operates with a 600MHz full-scale, full-power
bandwidth.
Ordering Information
PKG
CODE
The MAX19586 features parallel, low-voltage CMOS-
compatible outputs in two’s-complement output format.
PART
TEMP RANGE PIN-PACKAGE
56 Thin QFN-EP
56 Thin QFN-EP
MAX19586ETN
-40°C to +85°C
T5688-2
T5688-2
The MAX19586 is manufactured in an 8mm x 8mm,
56-pin thin QFN package with exposed paddle (EP) for
low thermal resistance, and is specified for the extend-
ed industrial (-40°C to +85°C) temperature range.
MAX19586ETN+ -40°C to +85°C
+Denotes lead-free package.
Pin Configuration
Applications
TOP VIEW
Cellular Base-Station Transceiver Systems (BTS)
Wireless Local Loop (WLL)
Multicarrier Receivers
42 41 40 39 38 37 36 35 34 33 32 31 30 29
28
27
26
25
D9 43
AGND
D10 44
D11 45
D12 46
D13 47
D14 48
D15 49
DAV 50
REFIN
REFOUT
Multistandard Receivers
AV
DD
DD
DD
24 AV
23 AV
E911 Location Receivers
22 AGND
21 AGND
20 AGND
High-Performance Instrumentation
Antenna Array Processing
MAX19586
DV
51
DD
DGND 52
DOR 53
N.C. 54
19 AV
18 AV
17 AV
DD
DD
DD
AV
AV
55
56
16 N.C.
15 N.C.
DD
DD
1
2
3
4
5
6
7
8
9
10 11 12 13 14
THIN QFN
8mm x 8mm
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.